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authorPiotr Esden-Tempski2012-10-05 13:08:03 -0700
committerPiotr Esden-Tempski2012-10-05 13:08:03 -0700
commit9e77f8c361407c61f2a72b98a5d1c50e72bf4a54 (patch)
tree9bcab3b920472c17525aa77da0390c56a4205a02
parentcb60e3760867133bbef90905c681881a2fb3ae50 (diff)
parent099a5626dba3a885d4e5b6903a5a5a642c3d6638 (diff)
Merging pull request #28 Random number generator defenition and example.
Merge remote-tracking branch 'tiltit/master'
-rw-r--r--examples/stm32/f4/stm32f4-discovery/random/Makefile25
-rw-r--r--examples/stm32/f4/stm32f4-discovery/random/README5
-rw-r--r--examples/stm32/f4/stm32f4-discovery/random/random.c88
-rw-r--r--include/libopencm3/stm32/f4/rng.h61
4 files changed, 179 insertions, 0 deletions
diff --git a/examples/stm32/f4/stm32f4-discovery/random/Makefile b/examples/stm32/f4/stm32f4-discovery/random/Makefile
new file mode 100644
index 0000000..4f06835
--- /dev/null
+++ b/examples/stm32/f4/stm32f4-discovery/random/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = random
+
+LDSCRIPT = ../stm32f4-discovery.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f4/stm32f4-discovery/random/README b/examples/stm32/f4/stm32f4-discovery/random/README
new file mode 100644
index 0000000..875e6bf
--- /dev/null
+++ b/examples/stm32/f4/stm32f4-discovery/random/README
@@ -0,0 +1,5 @@
+------------------------------------------------------------------------------
+README
+------------------------------------------------------------------------------
+
+This example randomly blinks the green LED on the ST STM32F4DISCOVERY eval board.
diff --git a/examples/stm32/f4/stm32f4-discovery/random/random.c b/examples/stm32/f4/stm32f4-discovery/random/random.c
new file mode 100644
index 0000000..9305be3
--- /dev/null
+++ b/examples/stm32/f4/stm32f4-discovery/random/random.c
@@ -0,0 +1,88 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include <libopencm3/cm3/common.h>
+#include <libopencm3/stm32/f4/rcc.h>
+#include <libopencm3/stm32/f4/gpio.h>
+#include <libopencm3/stm32/f4/rng.h>
+
+static void rcc_setup(void)
+{
+ rcc_clock_setup_hse_3v3(&hse_8mhz_3v3[CLOCK_3V3_120MHZ]);
+
+ /* Enable GPIOD clock for onboard leds. */
+ rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPDEN);
+
+ /* Enable rng clock */
+ rcc_peripheral_enable_clock(&RCC_AHB2ENR, RCC_AHB2ENR_RNGEN);
+}
+
+static void rng_setup(void)
+{
+ /* Enable interupt */
+ /* Set the IE bit in the RNG_CR register. */
+ RNG_CR |= RNG_CR_IE;
+ /* Enable the random number generation by setting the RNGEN bit in the RNG_CR
+ register. This activates the analog part, the RNG_LFSR and the error detector.
+ */
+ RNG_CR |= RNG_CR_EN;
+}
+
+static void gpio_setup(void)
+{
+ /* Setup onboard led */
+ gpio_mode_setup(GPIOD, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO12 | GPIO13);
+}
+
+/* Tried to folow the guidelines in the stm32f4 user manual.*/
+static u32 random_int(void)
+{
+ static u32 last_value=0;
+ static u32 new_value=0;
+ u32 error_bits = 0;
+ error_bits = RNG_SR_SEIS | RNG_SR_CEIS;
+ while (new_value==last_value) {
+ /* Check for error flags and if data is ready. */
+ if ( ((RNG_SR & error_bits) == 0) && ( (RNG_SR & RNG_SR_DRDY) == 1 ) )
+ new_value=RNG_DR;
+ }
+ last_value=new_value;
+ return new_value;
+}
+
+
+int main(void)
+{
+ int i,j;
+ rcc_setup();
+ gpio_setup();
+ rng_setup();
+ while(1){
+ u32 rnd;
+ rnd = random_int();
+ for(i=0;i!=32;++i){
+ if ( (rnd & (1 << i))!=0 )
+ gpio_set(GPIOD, GPIO12);
+ else
+ gpio_clear(GPIOD, GPIO12);
+ /* Delay */
+ for(j=0;j!=5000000;++j)
+ __asm__("nop");
+ }
+ }
+}
diff --git a/include/libopencm3/stm32/f4/rng.h b/include/libopencm3/stm32/f4/rng.h
new file mode 100644
index 0000000..5f517c8
--- /dev/null
+++ b/include/libopencm3/stm32/f4/rng.h
@@ -0,0 +1,61 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_RNG_H
+#define LIBOPENCM3_RNG_H
+
+#include <libopencm3/stm32/memorymap.h>
+#include <libopencm3/cm3/common.h>
+
+/* --- Random number generator registers ----------------------------------- */
+
+/* Control register */
+#define RNG_CR MMIO32(RNG_BASE + 0x00)
+
+/* Status register */
+#define RNG_SR MMIO32(RNG_BASE + 0x04)
+
+/* Data register */
+#define RNG_DR MMIO32(RNG_BASE + 0x08)
+
+/* --- RNG_CR values ------------------------------------------------------- */
+
+/* RNG ENABLE */
+#define RNG_CR_EN (1 << 2)
+
+/* RNG interupt enable */
+#define RNG_CR_IE (1 << 3)
+
+/* --- RNG_SR values ------------------------------------------------------- */
+
+/* Data ready */
+#define RNG_SR_DRDY (1 << 0)
+
+/* Clock error current status */
+#define RNG_SR_CECS (1 << 1)
+
+/* Seed error current status */
+#define RNG_SR_SECS (1 << 2)
+
+/* Clock error interup status */
+#define RNG_SR_CEIS (1 << 5)
+
+/* Seed error interup status */
+#define RNG_SR_SEIS (1 << 6)
+
+#endif