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authorPiotr Esden-Tempski2013-01-06 17:56:13 -0800
committerPiotr Esden-Tempski2013-01-06 17:56:13 -0800
commit44e350ad20b59448b7b11f0ea7f723fe9255dcf7 (patch)
treeafada8b7edd6f292d530415664af7ab62480bb79
parentc904c3ae575e1bdb9a6fe69a25f22a254516b201 (diff)
parent08a14a9d9e9f8acb5e38a422ca7d84a3ce0b02ef (diff)
Merging pull request #64 Various changes
Merge remote-tracking branch 'bgamari/master'
-rw-r--r--include/libopencm3/stm32/f4/memorymap.h5
-rw-r--r--include/libopencm3/stm32/usart.h2
-rw-r--r--lib/stm32/f4/adc.c10
-rw-r--r--lib/stm32/usart.c21
4 files changed, 28 insertions, 10 deletions
diff --git a/include/libopencm3/stm32/f4/memorymap.h b/include/libopencm3/stm32/f4/memorymap.h
index 0a22ad4..7625838 100644
--- a/include/libopencm3/stm32/f4/memorymap.h
+++ b/include/libopencm3/stm32/f4/memorymap.h
@@ -75,8 +75,9 @@
#define USART6_BASE (PERIPH_BASE_APB2 + 0x1400)
/* PERIPH_BASE_APB2 + 0x1800 (0x4001 1800 - 0x4001 1FFF): Reserved */
#define ADC1_BASE (PERIPH_BASE_APB2 + 0x2000)
-#define ADC2_BASE (PERIPH_BASE_APB2 + 0x2000)
-#define ADC3_BASE (PERIPH_BASE_APB2 + 0x2000)
+#define ADC2_BASE (PERIPH_BASE_APB2 + 0x2100)
+#define ADC3_BASE (PERIPH_BASE_APB2 + 0x2200)
+#define ADC_COMMON_BASE (PERIPH_BASE_APB2 + 0x2300)
/* PERIPH_BASE_APB2 + 0x2400 (0x4001 2400 - 0x4001 27FF): Reserved */
#define SDIO_BASE (PERIPH_BASE_APB2 + 0x2800)
/* PERIPH_BASE_APB2 + 0x2C00 (0x4001 2C00 - 0x4001 2FFF): Reserved */
diff --git a/include/libopencm3/stm32/usart.h b/include/libopencm3/stm32/usart.h
index 088e67b..9994002 100644
--- a/include/libopencm3/stm32/usart.h
+++ b/include/libopencm3/stm32/usart.h
@@ -371,6 +371,8 @@ void usart_enable_rx_interrupt(u32 usart);
void usart_disable_rx_interrupt(u32 usart);
void usart_enable_tx_interrupt(u32 usart);
void usart_disable_tx_interrupt(u32 usart);
+void usart_enable_error_interrupt(u32 usart);
+void usart_disable_error_interrupt(u32 usart);
bool usart_get_flag(u32 usart, u32 flag);
bool usart_get_interrupt_source(u32 usart, u32 flag);
diff --git a/lib/stm32/f4/adc.c b/lib/stm32/f4/adc.c
index 7475fac..aef49a4 100644
--- a/lib/stm32/f4/adc.c
+++ b/lib/stm32/f4/adc.c
@@ -435,17 +435,12 @@ void adc_set_right_aligned(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Enable DMA Transfers
-Only available for ADC1 through DMA1 channel1, and ADC3 through DMA2 channel5.
-ADC2 will use DMA if it is set as slave in dual mode with ADC1 in DMA transfer
-mode.
-
@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
*/
void adc_enable_dma(u32 adc)
{
- if ((adc == ADC1) | (adc == ADC3))
- ADC_CR2(adc) |= ADC_CR2_DMA;
+ ADC_CR2(adc) |= ADC_CR2_DMA;
}
/*-----------------------------------------------------------------------------*/
@@ -456,8 +451,7 @@ void adc_enable_dma(u32 adc)
void adc_disable_dma(u32 adc)
{
- if ((adc == ADC1) | (adc == ADC3))
- ADC_CR2(adc) &= ~ADC_CR2_DMA;
+ ADC_CR2(adc) &= ~ADC_CR2_DMA;
}
/*-----------------------------------------------------------------------------*/
diff --git a/lib/stm32/usart.c b/lib/stm32/usart.c
index 1faf486..cb46db8 100644
--- a/lib/stm32/usart.c
+++ b/lib/stm32/usart.c
@@ -400,6 +400,27 @@ void usart_disable_tx_interrupt(u32 usart)
USART_CR1(usart) &= ~USART_CR1_TXEIE;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Error Interrupt Enable.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+*/
+
+void usart_enable_error_interrupt(u32 usart)
+{
+ USART_CR3(usart) |= USART_CR3_EIE;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Error Interrupt Disable.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+*/
+
+void usart_disable_error_interrupt(u32 usart)
+{
+ USART_CR3(usart) &= ~USART_CR3_EIE;
+}
/*---------------------------------------------------------------------------*/
/** @brief USART Read a Status Flag.