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authorchrysn2012-04-19 17:28:55 +0200
committerchrysn2012-04-19 17:28:55 +0200
commit09fea0bc1bb9f38676375d4165676f8f35f5c66a (patch)
tree288ee822ed165049e13e0b6fd325e9bb3d16d85f
parent705cdab7d702772829fd4cff37cf22bab9f59ddb (diff)
parent66c5f91a870105aa1f70388d834fffe1bac9947c (diff)
Merge branch 'master' into efm32
Conflicts: Makefile
-rw-r--r--.gitignore1
-rw-r--r--Makefile2
-rw-r--r--examples/lpc17xx/Makefile.include124
-rw-r--r--examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld32
-rw-r--r--examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile24
-rw-r--r--examples/lpc17xx/blueboard-lpc1768-h/miniblink/README9
-rw-r--r--examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c52
-rw-r--r--examples/stm32/f1/lisa-m-2/usart/Makefile25
-rw-r--r--examples/stm32/f1/lisa-m-2/usart/README12
-rw-r--r--examples/stm32/f1/lisa-m-2/usart/usart.c86
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_dma/Makefile25
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c199
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_irq/Makefile25
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c126
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile25
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c269
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_printf/Makefile25
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c106
-rw-r--r--examples/stm32/f1/stm32-h103/usb_iap/usbiap.c2
-rw-r--r--examples/stm32/f2/jobygps/jobygps.ld6
-rw-r--r--include/libopencm3/lpc17xx/gpio.h138
-rw-r--r--include/libopencm3/lpc17xx/memorymap.h65
-rw-r--r--include/libopencm3/stm32/f1/adc.h209
-rw-r--r--include/libopencm3/stm32/f1/dma.h24
-rw-r--r--include/libopencm3/stm32/f1/gpio.h1
-rw-r--r--include/libopencm3/stm32/f1/memorymap.h2
-rw-r--r--include/libopencm3/stm32/f2/gpio.h2
-rw-r--r--include/libopencm3/stm32/f4/gpio.h2
-rw-r--r--include/libopencm3/stm32/fsmc.h16
-rw-r--r--lib/lm3s/Makefile12
-rw-r--r--lib/lpc13xx/Makefile12
-rw-r--r--lib/lpc17xx/Makefile58
-rw-r--r--lib/lpc17xx/gpio.c30
-rw-r--r--lib/lpc17xx/libopencm3_lpc17xx.ld73
-rw-r--r--lib/lpc17xx/vector.c94
-rw-r--r--lib/stm32/f1/Makefile12
-rw-r--r--lib/stm32/f1/adc.c12
-rw-r--r--lib/stm32/f1/can.c2
-rw-r--r--lib/stm32/f1/libopencm3_stm32f1.ld32
-rw-r--r--lib/stm32/f2/Makefile12
-rw-r--r--lib/stm32/f2/libopencm3_stm32f2.ld32
-rw-r--r--lib/stm32/f4/Makefile12
-rw-r--r--lib/stm32/f4/libopencm3_stm32f4.ld32
-rw-r--r--lib/stm32/spi.c5
44 files changed, 1909 insertions, 155 deletions
diff --git a/.gitignore b/.gitignore
index 42d6761..f0c86ce 100644
--- a/.gitignore
+++ b/.gitignore
@@ -6,5 +6,6 @@
*.srec
*.a
*.elf
+*.swp
\#*
.\#*
diff --git a/Makefile b/Makefile
index 09db92a..931e247 100644
--- a/Makefile
+++ b/Makefile
@@ -25,7 +25,7 @@ LIBDIR = $(DESTDIR)/$(PREFIX)/lib
SHAREDIR = $(DESTDIR)/$(PREFIX)/share/libopencm3/scripts
INSTALL = install
-TARGETS = stm32/f1 stm32/f2 stm32/f4 lpc13xx lm3s efm32/tinygecko
+TARGETS = stm32/f1 stm32/f2 stm32/f4 lpc13xx lpc17xx lm3s efm32/tinygecko
# Be silent per default, but 'make V=1' will show all compiler calls.
ifneq ($(V),1)
diff --git a/examples/lpc17xx/Makefile.include b/examples/lpc17xx/Makefile.include
new file mode 100644
index 0000000..8d6efe7
--- /dev/null
+++ b/examples/lpc17xx/Makefile.include
@@ -0,0 +1,124 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+## Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+PREFIX ?= arm-none-eabi
+#PREFIX ?= arm-elf
+CC = $(PREFIX)-gcc
+LD = $(PREFIX)-gcc
+OBJCOPY = $(PREFIX)-objcopy
+OBJDUMP = $(PREFIX)-objdump
+# Uncomment this line if you want to use the installed (not local) library.
+# TOOLCHAIN_DIR := $(shell dirname `which $(CC)`)/../$(PREFIX)
+TOOLCHAIN_DIR = ../../../..
+CFLAGS += -O0 -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include -fno-common \
+ -mcpu=cortex-m3 -mthumb -MD
+LDSCRIPT ?= $(BINARY).ld
+LDFLAGS += -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib/lpc17xx \
+ -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections
+OBJS += $(BINARY).o
+
+OOCD ?= openocd
+OOCD_INTERFACE ?= flossjtag
+OOCD_BOARD ?= olimex_stm32_h103
+# FIXME
+
+# Be silent per default, but 'make V=1' will show all compiler calls.
+ifneq ($(V),1)
+Q := @
+NULL := 2>/dev/null
+else
+LDFLAGS += -Wl,--print-gc-sections
+endif
+
+.SUFFIXES: .elf .bin .hex .srec .list .images
+.SECONDEXPANSION:
+.SECONDARY:
+
+all: images
+
+images: $(BINARY).images
+flash: $(BINARY).flash
+
+%.images: %.bin %.hex %.srec %.list
+ @#echo "*** $* images generated ***"
+
+%.bin: %.elf
+ @#printf " OBJCOPY $(*).bin\n"
+ $(Q)$(OBJCOPY) -Obinary $(*).elf $(*).bin
+
+%.hex: %.elf
+ @#printf " OBJCOPY $(*).hex\n"
+ $(Q)$(OBJCOPY) -Oihex $(*).elf $(*).hex
+
+%.srec: %.elf
+ @#printf " OBJCOPY $(*).srec\n"
+ $(Q)$(OBJCOPY) -Osrec $(*).elf $(*).srec
+
+%.list: %.elf
+ @#printf " OBJDUMP $(*).list\n"
+ $(Q)$(OBJDUMP) -S $(*).elf > $(*).list
+
+%.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/lpc17xx/libopencm3_lpc17xx.a
+ @#printf " LD $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(LD) $(LDFLAGS) -o $(*).elf $(OBJS) -lopencm3_lpc17xx
+
+%.o: %.c Makefile
+ @#printf " CC $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(CC) $(CFLAGS) -o $@ -c $<
+
+clean:
+ $(Q)rm -f *.o
+ $(Q)rm -f *.d
+ $(Q)rm -f *.elf
+ $(Q)rm -f *.bin
+ $(Q)rm -f *.hex
+ $(Q)rm -f *.srec
+ $(Q)rm -f *.list
+
+# FIXME: Replace STM32 stuff with proper LPC13XX OpenOCD support later.
+ifeq ($(OOCD_SERIAL),)
+%.flash: %.hex
+ @printf " FLASH $<\n"
+ @# IMPORTANT: Don't use "resume", only "reset" will work correctly!
+ $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \
+ -f board/$(OOCD_BOARD).cfg \
+ -c "init" -c "reset init" \
+ -c "stm32x mass_erase 0" \
+ -c "flash write_image $(*).hex" \
+ -c "reset" \
+ -c "shutdown" $(NULL)
+else
+%.flash: %.hex
+ @printf " FLASH $<\n"
+ @# IMPORTANT: Don't use "resume", only "reset" will work correctly!
+ $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \
+ -f board/$(OOCD_BOARD).cfg \
+ -c "ft2232_serial $(OOCD_SERIAL)" \
+ -c "init" -c "reset init" \
+ -c "stm32x mass_erase 0" \
+ -c "flash write_image $(*).hex" \
+ -c "reset" \
+ -c "shutdown" $(NULL)
+endif
+
+.PHONY: images clean
+
+-include $(OBJS:.o=.d)
+
diff --git a/examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld b/examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld
new file mode 100644
index 0000000..e2e480f
--- /dev/null
+++ b/examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Linker script for Blueboard-LPC1768-H (LPC1768, 512K flash, 64K SRAM). */
+
+/* Define memory regions. */
+MEMORY
+{
+ rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K
+ ram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K
+ ram1 (rwx) : ORIGIN = 0x2007C000, LENGTH = 16K
+ ram2 (rwx) : ORIGIN = 0x20080000, LENGTH = 16K
+}
+
+/* Include the common ld script. */
+INCLUDE libopencm3_lpc17xx.ld
diff --git a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile
new file mode 100644
index 0000000..2c8d016
--- /dev/null
+++ b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile
@@ -0,0 +1,24 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = miniblink
+
+LDSCRIPT = ../blueboard-lpc1768-h.ld
+
+include ../../Makefile.include
diff --git a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/README b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/README
new file mode 100644
index 0000000..7354adf
--- /dev/null
+++ b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/README
@@ -0,0 +1,9 @@
+------------------------------------------------------------------------------
+README
+------------------------------------------------------------------------------
+
+This is the smallest-possible example program using libopencm3.
+
+It's intended for the NXP LPC1768-based NGX Blueboard-LPC1768-H eval board (see
+http://shop.ngxtechnologies.com/product_info.php?cPath=21&products_id=65). It should blink
+a LED on the board.
diff --git a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c
new file mode 100644
index 0000000..33d413b
--- /dev/null
+++ b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c
@@ -0,0 +1,52 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/lpc17xx/gpio.h>
+
+void gpio_setup(void)
+{
+ GPIO1_DIR |= (1 << 29); /* Configure P1_29 as output. */
+}
+
+int main(void)
+{
+ int i;
+
+ gpio_setup();
+
+ /* Blink LED0 (P3_0) on the board. */
+ while (1) {
+ /* Manually: */
+ //GPIO1_SET = (1 << 29); /* LED on */
+ //for (i = 0; i < 800000; i++) /* Wait a bit. */
+ // __asm__("nop");
+ //GPIO1_CLR = (1 << 29); /* LED off */
+ //for (i = 0; i < 800000; i++) /* Wait a bit. */
+ // __asm__("nop");
+
+ gpio_set(GPIO1, GPIOPIN29); /* LED on */
+ for (i = 0; i < 800000; i++) /* Wait a bit. */
+ __asm__("nop");
+ gpio_clear(GPIO1, GPIOPIN29); /* LED off */
+ for (i = 0; i < 800000; i++) /* Wait a bit. */
+ __asm__("nop");
+ }
+
+ return 0;
+}
diff --git a/examples/stm32/f1/lisa-m-2/usart/Makefile b/examples/stm32/f1/lisa-m-2/usart/Makefile
new file mode 100644
index 0000000..4ba7e9e
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = usart
+
+LDSCRIPT = ../lisa-m.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f1/lisa-m-2/usart/README b/examples/stm32/f1/lisa-m-2/usart/README
new file mode 100644
index 0000000..5a3f316
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart/README
@@ -0,0 +1,12 @@
+------------------------------------------------------------------------------
+README
+------------------------------------------------------------------------------
+
+This example program sends some characters on USART2 on Lisa/M 2.0 board
+(see http://paparazzi.enac.fr/wiki/LisaM for details).
+
+The terminal settings for the receiving device/PC are 38400 8n1.
+
+The sending is done in a blocking way in the code, see the usart_irq example
+for a more elaborate USART example.
+
diff --git a/examples/stm32/f1/lisa-m-2/usart/usart.c b/examples/stm32/f1/lisa-m-2/usart/usart.c
new file mode 100644
index 0000000..4422b55
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart/usart.c
@@ -0,0 +1,86 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/gpio.h>
+#include <libopencm3/stm32/usart.h>
+
+void clock_setup(void)
+{
+ rcc_clock_setup_in_hse_12mhz_out_72mhz();
+
+ /* Enable GPIOA, GPIOB, GPIOC clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR,
+ RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN |
+ RCC_APB2ENR_IOPCEN);
+
+ /* Enable clocks for GPIO port B (for GPIO_USART3_TX) and USART3. */
+ rcc_peripheral_enable_clock(&RCC_APB1ENR,
+ RCC_APB1ENR_USART2EN);
+}
+
+void usart_setup(void)
+{
+ /* Setup GPIO pin GPIO_USART2_TX. */
+ gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX);
+
+ /* Setup UART parameters. */
+ usart_set_baudrate(USART2, 38400);
+ usart_set_databits(USART2, 8);
+ usart_set_stopbits(USART2, USART_STOPBITS_1);
+ usart_set_mode(USART2, USART_MODE_TX);
+ usart_set_parity(USART2, USART_PARITY_NONE);
+ usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE);
+
+ /* Finally enable the USART. */
+ usart_enable(USART2);
+
+}
+
+void gpio_setup(void)
+{
+ /* Set GPIO8 (in GPIO port A) to 'output push-pull'. */
+ gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO8);
+}
+
+int main(void)
+{
+ int i, j = 0, c = 0;
+
+ clock_setup();
+ gpio_setup();
+ usart_setup();
+
+ /* Blink the LED (PA8) on the board with every transmitted byte. */
+ while (1) {
+ gpio_toggle(GPIOA, GPIO8); /* LED on/off */
+ usart_send_blocking(USART2, c + '0'); /* USART2: Send byte. */
+ c = (c == 9) ? 0 : c + 1; /* Increment c. */
+ if ((j++ % 80) == 0) { /* Newline after line full. */
+ usart_send_blocking(USART2, '\r');
+ usart_send_blocking(USART2, '\n');
+ }
+ for (i = 0; i < 800000; i++) /* Wait a bit. */
+ __asm__("nop");
+ }
+
+ return 0;
+}
diff --git a/examples/stm32/f1/lisa-m-2/usart_dma/Makefile b/examples/stm32/f1/lisa-m-2/usart_dma/Makefile
new file mode 100644
index 0000000..813cda9
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart_dma/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = usart_dma
+
+LDSCRIPT = ../lisa-m.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c b/examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c
new file mode 100644
index 0000000..ac3bb3c
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c
@@ -0,0 +1,199 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/gpio.h>
+#include <libopencm3/stm32/usart.h>
+#include <libopencm3/stm32/f1/dma.h>
+#include <libopencm3/stm32/nvic.h>
+
+void clock_setup(void)
+{
+ rcc_clock_setup_in_hse_12mhz_out_72mhz();
+
+ /* Enable GPIOA, GPIOB, GPIOC clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR,
+ RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN |
+ RCC_APB2ENR_IOPCEN);
+
+ /* Enable clocks for GPIO port B (for GPIO_USART3_TX) and USART3. */
+ rcc_peripheral_enable_clock(&RCC_APB1ENR,
+ RCC_APB1ENR_USART2EN);
+
+ /* Enable DMA1 clock */
+ rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_DMA1EN);
+}
+
+void usart_setup(void)
+{
+ /* Setup GPIO pin GPIO_USART2_TX and GPIO_USART2_RX. */
+ gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX);
+ gpio_set_mode(GPIOA, GPIO_MODE_INPUT,
+ GPIO_CNF_INPUT_FLOAT, GPIO_USART2_RX);
+
+ /* Setup UART parameters. */
+ usart_set_baudrate(USART2, 38400);
+ usart_set_databits(USART2, 8);
+ usart_set_stopbits(USART2, USART_STOPBITS_1);
+ usart_set_mode(USART2, USART_MODE_TX_RX);
+ usart_set_parity(USART2, USART_PARITY_NONE);
+ usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE);
+
+ /* Finally enable the USART. */
+ usart_enable(USART2);
+
+ nvic_set_priority(NVIC_DMA1_CHANNEL7_IRQ, 0);
+ nvic_enable_irq(NVIC_DMA1_CHANNEL7_IRQ);
+
+ nvic_set_priority(NVIC_DMA1_CHANNEL6_IRQ, 0);
+ nvic_enable_irq(NVIC_DMA1_CHANNEL6_IRQ);
+
+}
+
+void dma_write(char *data, int size)
+{
+ /*
+ * Using channel 7 for USART2_TX
+ */
+
+ /* Reset DMA channel*/
+ dma_channel_reset(DMA1, DMA_CHANNEL7);
+
+ dma_set_peripheral_address(DMA1, DMA_CHANNEL7, (u32)&USART2_DR);
+ dma_set_memory_address(DMA1, DMA_CHANNEL7, (u32)data);
+ dma_set_number_of_data(DMA1, DMA_CHANNEL7, size);
+ dma_set_read_from_memory(DMA1, DMA_CHANNEL7);
+ dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL7);
+ dma_set_peripheral_size(DMA1, DMA_CHANNEL7, DMA_CCR_PSIZE_8BIT);
+ dma_set_memory_size(DMA1, DMA_CHANNEL7, DMA_CCR_MSIZE_8BIT);
+ dma_set_priority(DMA1, DMA_CHANNEL7, DMA_CCR_PL_VERY_HIGH);
+
+ dma_enable_transfer_complete_interrupt(DMA1, DMA_CHANNEL7);
+
+ dma_enable_channel(DMA1, DMA_CHANNEL7);
+
+ usart_enable_tx_dma(USART2);
+}
+
+volatile int transfered = 0;
+
+void dma1_channel7_isr(void)
+{
+ if ((DMA1_ISR &DMA_ISR_TCIF7) != 0) {
+ DMA1_IFCR |= DMA_IFCR_CTCIF7;
+
+ transfered = 1;
+ }
+
+ dma_disable_transfer_complete_interrupt(DMA1, DMA_CHANNEL7);
+
+ usart_disable_tx_dma(USART2);
+
+ dma_disable_channel(DMA1, DMA_CHANNEL7);
+}
+
+void dma_read(char *data, int size)
+{
+ /*
+ * Using channel 6 for USART2_RX
+ */
+
+ /* Reset DMA channel*/
+ dma_channel_reset(DMA1, DMA_CHANNEL6);
+
+ dma_set_peripheral_address(DMA1, DMA_CHANNEL6, (u32)&USART2_DR);
+ dma_set_memory_address(DMA1, DMA_CHANNEL6, (u32)data);
+ dma_set_number_of_data(DMA1, DMA_CHANNEL6, size);
+ dma_set_read_from_peripheral(DMA1, DMA_CHANNEL6);
+ dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL6);
+ dma_set_peripheral_size(DMA1, DMA_CHANNEL6, DMA_CCR_PSIZE_8BIT);
+ dma_set_memory_size(DMA1, DMA_CHANNEL6, DMA_CCR_MSIZE_8BIT);
+ dma_set_priority(DMA1, DMA_CHANNEL6, DMA_CCR_PL_HIGH);
+
+ dma_enable_transfer_complete_interrupt(DMA1, DMA_CHANNEL6);
+
+ dma_enable_channel(DMA1, DMA_CHANNEL6);
+
+ usart_enable_rx_dma(USART2);
+}
+
+volatile int received = 0;
+
+void dma1_channel6_isr(void)
+{
+ if ((DMA1_ISR &DMA_ISR_TCIF6) != 0) {
+ DMA1_IFCR |= DMA_IFCR_CTCIF6;
+
+ received = 1;
+ }
+
+ dma_disable_transfer_complete_interrupt(DMA1, DMA_CHANNEL6);
+
+ usart_disable_rx_dma(USART2);
+
+ dma_disable_channel(DMA1, DMA_CHANNEL6);
+}
+
+void gpio_setup(void)
+{
+ /* Set GPIO8 (in GPIO port A) to 'output push-pull'. */
+ gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO8);
+}
+
+int main(void)
+{
+ char tx[10] = "abcdefg\r\n";
+ int tx_len = 10;
+ char rx[7] = "bcdefg";
+ int rx_len = 6;
+
+ clock_setup();
+ gpio_setup();
+ usart_setup();
+
+ transfered = 0;
+ dma_write(tx, tx_len);
+ received = 0;
+ dma_read(rx, rx_len);
+
+ /* Blink the LED (PA8) on the board with every transmitted byte. */
+ while (1) {
+ gpio_toggle(GPIOA, GPIO8); /* LED on/off */
+ while ( transfered != 1) {
+ if (received == 1) {
+ tx[1] = rx[0];
+ tx[2] = rx[1];
+ tx[3] = rx[2];
+ tx[4] = rx[3];
+ tx[5] = rx[4];
+ tx[6] = rx[5];
+ received = 0;
+ dma_read(rx, rx_len);
+ }
+ }
+ tx[0]++;
+ if (tx[0] > 'z') tx[0] = 'a';
+ transfered = 0;
+ dma_write(tx, tx_len);
+ }
+
+ return 0;
+}
diff --git a/examples/stm32/f1/lisa-m-2/usart_irq/Makefile b/examples/stm32/f1/lisa-m-2/usart_irq/Makefile
new file mode 100644
index 0000000..7baa2fe
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart_irq/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = usart_irq
+
+LDSCRIPT = ../lisa-m.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c b/examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c
new file mode 100644
index 0000000..dbe9140
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c
@@ -0,0 +1,126 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/gpio.h>
+#include <libopencm3/stm32/usart.h>
+#include <libopencm3/stm32/nvic.h>
+
+void clock_setup(void)
+{
+ rcc_clock_setup_in_hse_12mhz_out_72mhz();
+
+ /* Enable GPIOA clock (for LED GPIOs). */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPCEN);
+
+ /* Enable clocks for GPIO port A (for GPIO_USART2_TX) and USART2. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN |
+ RCC_APB2ENR_AFIOEN);
+
+ rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN);
+}
+
+void usart_setup(void)
+{
+ /* Enable the USART2 interrupt. */
+ nvic_enable_irq(NVIC_USART2_IRQ);
+
+ /* Setup GPIO pin GPIO_USART2_TX on GPIO port A for transmit. */
+ gpio_set_mode(GPIO_BANK_USART2_TX, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX);
+
+ /* Setup GPIO pin GPIO_USART2_RX on GPIO port A for receive. */
+ gpio_set_mode(GPIO_BANK_USART2_RX, GPIO_MODE_INPUT,
+ GPIO_CNF_INPUT_FLOAT, GPIO_USART2_RX);
+
+ /* Setup UART parameters. */
+ usart_set_baudrate(USART2, 230400);
+ usart_set_databits(USART2, 8);
+ usart_set_stopbits(USART2, USART_STOPBITS_1);
+ usart_set_parity(USART2, USART_PARITY_NONE);
+ usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE);
+ usart_set_mode(USART2, USART_MODE_TX_RX);
+
+ /* Enable USART2 Receive interrupt. */
+ USART_CR1(USART2) |= USART_CR1_RXNEIE;
+
+ /* Finally enable the USART. */
+ usart_enable(USART2);
+}
+
+void gpio_setup(void)
+{
+ gpio_set(GPIOA, GPIO8);
+
+ /* Setup GPIO8 (in GPIO port A) for LED use. */
+ gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO8);
+
+ gpio_set(GPIOC, GPIO15);
+
+ /* Setup GPIO15 (in GPIO port C) for LED use. */
+ gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO15);
+}
+
+void usart2_isr(void)
+{
+ static u8 data = 'A';
+
+ /* Check if we were called because of RXNE. */
+ if (((USART_CR1(USART2) & USART_CR1_RXNEIE) != 0) &&
+ ((USART_SR(USART2) & USART_SR_RXNE) != 0)) {
+
+ /* Indicate that we got data. */
+ gpio_toggle(GPIOA, GPIO8);
+
+ /* Retrieve the data from the peripheral. */
+ data = usart_recv(USART2);
+
+ /* Enable transmit interrupt so it sends back the data. */
+ USART_CR1(USART2) |= USART_CR1_TXEIE;
+ }
+
+ /* Check if we were called because of TXE. */
+ if (((USART_CR1(USART2) & USART_CR1_TXEIE) != 0) &&
+ ((USART_SR(USART2) & USART_SR_TXE) != 0)) {
+
+ /* Indicate that we are sending out data. */
+ gpio_toggle(GPIOC, GPIO15);
+
+ /* Put data into the transmit register. */
+ usart_send(USART2, data);
+
+ /* Disable the TXE interrupt as we don't need it anymore. */
+ USART_CR1(USART2) &= ~USART_CR1_TXEIE;
+ }
+}
+
+int main(void)
+{
+ clock_setup();
+ gpio_setup();
+ usart_setup();
+
+ /* Wait forever and do nothing. */
+ while (1)
+ __asm__("nop");
+
+ return 0;
+}
diff --git a/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile b/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile
new file mode 100644
index 0000000..0b6fd3e
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = usart_irq_printf
+
+LDSCRIPT = ../lisa-m.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c b/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c
new file mode 100644
index 0000000..6b1096e
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c
@@ -0,0 +1,269 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>,
+ * Copyright (C) 2011 Piotr Esden-Tempski <piotr@esden.net>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/gpio.h>
+#include <libopencm3/stm32/usart.h>
+#include <libopencm3/stm32/nvic.h>
+#include <libopencm3/stm32/systick.h>
+#include <stdio.h>
+#include <errno.h>
+
+/******************************************************************************
+ * Simple ringbuffer implementation from open-bldc's libgovernor that
+ * you can find at:
+ * https://github.com/open-bldc/open-bldc/tree/master/source/libgovernor
+ *****************************************************************************/
+
+typedef s32 ring_size_t;
+
+struct ring {
+ u8 *data;
+ ring_size_t size;
+ u32 begin;
+ u32 end;
+};
+
+#define RING_SIZE(RING) ((RING)->size - 1)
+#define RING_DATA(RING) (RING)->data
+#define RING_EMPTY(RING) ((RING)->begin == (RING)->end)
+
+void ring_init(struct ring *ring, u8 *buf, ring_size_t size)
+{
+ ring->data = buf;
+ ring->size = size;
+ ring->begin = 0;
+ ring->end = 0;
+}
+
+s32 ring_write_ch(struct ring *ring, u8 ch)
+{
+ if (((ring->end + 1) % ring->size) != ring->begin) {
+ ring->data[ring->end++] = ch;
+ ring->end %= ring->size;
+ return (u32)ch;
+ }
+
+ return -1;
+}
+
+s32 ring_write(struct ring *ring, u8 *data, ring_size_t size)
+{
+ s32 i;
+
+ for (i = 0; i < size; i++) {
+ if (ring_write_ch(ring, data[i]) < 0)
+ return -i;
+ }
+
+ return i;
+}
+
+s32 ring_read_ch(struct ring *ring, u8 *ch)
+{
+ s32 ret = -1;
+
+ if (ring->begin != ring->end) {
+ ret = ring->data[ring->begin++];
+ ring->begin %= ring->size;
+ if (ch)
+ *ch = ret;
+ }
+
+ return ret;
+}
+
+s32 ring_read(struct ring *ring, u8 *data, ring_size_t size)
+{
+ s32 i;
+
+ for (i = 0; i < size; i++) {
+ if (ring_read_ch(ring, data + i) < 0)
+ return i;
+ }
+
+ return -i;
+}
+
+/******************************************************************************
+ * The example implementation
+ *****************************************************************************/
+
+#define BUFFER_SIZE 1024
+
+struct ring output_ring;
+u8 output_ring_buffer[BUFFER_SIZE];
+
+void clock_setup(void)
+{
+ rcc_clock_setup_in_hse_12mhz_out_72mhz();
+
+ /* Enable GPIOA clock (for LED GPIOs). */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN);
+
+ /* Enable clocks for GPIO port A (for GPIO_USART2_TX) and USART2. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN |
+ RCC_APB2ENR_AFIOEN);
+ rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN);
+}
+
+void usart_setup(void)
+{
+ /* Initialize output ring buffer. */
+ ring_init(&output_ring, output_ring_buffer, BUFFER_SIZE);
+
+ /* Enable the USART2 interrupt. */
+ nvic_enable_irq(NVIC_USART2_IRQ);
+
+ /* Setup GPIO pin GPIO_USART2_TX on GPIO port A for transmit. */
+ gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX);
+
+ /* Setup GPIO pin GPIO_USART2_RX on GPIO port A for receive. */
+ gpio_set_mode(GPIOA, GPIO_MODE_INPUT,
+ GPIO_CNF_INPUT_FLOAT, GPIO_USART2_RX);
+
+ /* Setup UART parameters. */
+ usart_set_baudrate(USART2, 230400);
+ usart_set_databits(USART2, 8);
+ usart_set_stopbits(USART2, USART_STOPBITS_1);
+ usart_set_parity(USART2, USART_PARITY_NONE);
+ usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE);
+ usart_set_mode(USART2, USART_MODE_TX_RX);
+
+ /* Enable USART2 Receive interrupt. */
+ USART_CR1(USART2) |= USART_CR1_RXNEIE;
+
+ /* Finally enable the USART. */
+ usart_enable(USART2);
+}
+
+void gpio_setup(void)
+{
+ gpio_set(GPIOA, GPIO8);
+
+ /* Setup GPIO8 (in GPIO port A) for LED use. */
+ gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO8);
+}
+
+void usart2_isr(void)
+{
+ /* Check if we were called because of RXNE. */
+ if (((USART_CR1(USART2) & USART_CR1_RXNEIE) != 0) &&
+ ((USART_SR(USART2) & USART_SR_RXNE) != 0)) {
+
+ /* Indicate that we got data. */
+ gpio_toggle(GPIOA, GPIO8);
+
+ /* Retrieve the data from the peripheral. */
+ ring_write_ch(&output_ring, usart_recv(USART2));
+
+ /* Enable transmit interrupt so it sends back the data. */
+ USART_CR1(USART2) |= USART_CR1_TXEIE;
+ }
+
+ /* Check if we were called because of TXE. */
+ if (((USART_CR1(USART2) & USART_CR1_TXEIE) != 0) &&
+ ((USART_SR(USART2) & USART_SR_TXE) != 0)) {
+
+ s32 data;
+
+ data = ring_read_ch(&output_ring, NULL);
+
+ if (data == -1) {
+ /* Disable the TXE interrupt, it's no longer needed. */
+ USART_CR1(USART2) &= ~USART_CR1_TXEIE;
+ } else {
+ /* Put data into the transmit register. */
+ usart_send(USART2, data);
+ }
+ }
+}
+
+int _write(int file, char *ptr, int len)
+{
+ int ret;
+
+ if (file == 1) {
+ ret = ring_write(&output_ring, (u8 *)ptr, len);
+
+ if (ret < 0)
+ ret = -ret;
+
+ USART_CR1(USART2) |= USART_CR1_TXEIE;
+
+ return ret;
+ }
+
+ errno = EIO;
+ return -1;
+}
+
+void systick_setup(void)
+{
+ /* 72MHz / 8 => 9000000 counts per second. */
+ systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8);
+
+ /* 9000000/9000 = 1000 overflows per second - every 1ms one interrupt */
+ systick_set_reload(9000);
+
+ systick_interrupt_enable();
+
+ /* Start counting. */
+ systick_counter_enable();
+}
+
+void sys_tick_handler(void)
+{
+ static int counter = 0;
+ static float fcounter = 0.0;
+ static double dcounter = 0.0;
+ static u32 temp32 = 0;
+
+ temp32++;
+
+ /*
+ * We call this handler every 1ms so we are sending hello world
+ * every 10ms / 100Hz.
+ */
+ if (temp32 == 10) {
+ printf("Hello World! %i %f %f\r\n", counter, fcounter,
+ dcounter);
+ counter++;
+ fcounter += 0.01;
+ dcounter += 0.01;
+
+ temp32 = 0;
+ }
+}
+
+int main(void)
+{
+ clock_setup();
+ gpio_setup();
+ usart_setup();
+ systick_setup();
+
+ while (1)
+ __asm__("nop");
+
+ return 0;
+}
diff --git a/examples/stm32/f1/lisa-m-2/usart_printf/Makefile b/examples/stm32/f1/lisa-m-2/usart_printf/Makefile
new file mode 100644
index 0000000..80ac033
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart_printf/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = usart_printf
+
+LDSCRIPT = ../lisa-m.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c b/examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c
new file mode 100644
index 0000000..a66bcbc
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c
@@ -0,0 +1,106 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>,
+ * Copyright (C) 2011-2012 Piotr Esden-Tempski <piotr@esden.net>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/gpio.h>
+#include <libopencm3/stm32/usart.h>
+#include <libopencm3/stm32/nvic.h>
+#include <stdio.h>
+#include <errno.h>
+
+void clock_setup(void)
+{
+ rcc_clock_setup_in_hse_12mhz_out_72mhz();
+
+ /* Enable GPIOA clock (for LED GPIOs). */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
+
+ /* Enable clocks for GPIO port A (for GPIO_USART2_TX) and USART2. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN |
+ RCC_APB2ENR_AFIOEN);
+ rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN);
+}
+
+void usart_setup(void)
+{
+ /* Setup GPIO pin GPIO_USART2_RE_TX on GPIO port B for transmit. */
+ gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX);
+
+ /* Setup UART parameters. */
+ usart_set_baudrate(USART2, 230400);
+ usart_set_databits(USART2, 8);
+ usart_set_stopbits(USART2, USART_STOPBITS_1);
+ usart_set_parity(USART2, USART_PARITY_NONE);
+ usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE);
+ usart_set_mode(USART2, USART_MODE_TX);
+
+ /* Finally enable the USART. */
+ usart_enable(USART2);
+}
+
+void gpio_setup(void)
+{
+ gpio_set(GPIOA, GPIO8);
+
+ /* Setup GPIO8 (in GPIO port A) for LED use. */
+ gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO8);
+}
+
+int _write(int file, char *ptr, int len)
+{
+ int i;
+
+ if (file == 1) {
+ for (i = 0; i < len; i++)
+ usart_send_blocking(USART2, ptr[i]);
+ return i;
+ }
+
+ errno = EIO;
+ return -1;
+}
+
+int main(void)
+{
+ int counter = 0;
+ float fcounter = 0.0;
+ double dcounter = 0.0;
+
+ clock_setup();
+ gpio_setup();
+ usart_setup();
+
+ /*
+ * Write Hello World, an integer, float and double all over
+ * again while incrementing the numbers.
+ */
+ while (1) {
+ gpio_toggle(GPIOA, GPIO8);
+ printf("Hello World! %i %f %f\r\n", counter, fcounter,
+ dcounter);
+ counter++;
+ fcounter += 0.01;
+ dcounter += 0.01;
+ }
+
+ return 0;
+}
diff --git a/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c b/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c
index 3cf7044..c5cc8ba 100644
--- a/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c
+++ b/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c
@@ -149,7 +149,7 @@ static void usbdfu_getstatus_complete(struct usb_setup_data *req)
u32 baseaddr = prog.addr + ((prog.blocknum - 2) *
dfu_function.wTransferSize);
for (i = 0; i < prog.len; i += 2)
- flash_library_half_word(baseaddr + i,
+ flash_program_half_word(baseaddr + i,
*(u16 *)(prog.buf + i));
}
flash_lock();
diff --git a/examples/stm32/f2/jobygps/jobygps.ld b/examples/stm32/f2/jobygps/jobygps.ld
index d8271ff..73caf0e 100644
--- a/examples/stm32/f2/jobygps/jobygps.ld
+++ b/examples/stm32/f2/jobygps/jobygps.ld
@@ -4,16 +4,16 @@
* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
*
* This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser Lesser General Public License as published by
+ * it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser Lesser General Public License for more details.
+ * GNU Lesser General Public License for more details.
*
- * You should have received a copy of the GNU Lesser Lesser General Public License
+ * You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
diff --git a/include/libopencm3/lpc17xx/gpio.h b/include/libopencm3/lpc17xx/gpio.h
new file mode 100644
index 0000000..7b07ac5
--- /dev/null
+++ b/include/libopencm3/lpc17xx/gpio.h
@@ -0,0 +1,138 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LPC17XX_GPIO_H
+#define LPC17XX_GPIO_H
+
+#include <libopencm3/cm3/common.h>
+#include <libopencm3/lpc17xx/memorymap.h>
+
+/* --- Convenience macros -------------------------------------------------- */
+
+/* GPIO port base addresses (for convenience) */
+#define GPIO0 GPIO_PIO0_BASE
+#define GPIO1 GPIO_PIO1_BASE
+#define GPIO2 GPIO_PIO2_BASE
+#define GPIO3 GPIO_PIO3_BASE
+#define GPIO4 GPIO_PIO4_BASE
+
+/* GPIO number definitions (for convenience) */
+#define GPIOPIN0 (1 << 0)
+#define GPIOPIN1 (1 << 1)
+#define GPIOPIN2 (1 << 2)
+#define GPIOPIN3 (1 << 3)
+#define GPIOPIN4 (1 << 4)
+#define GPIOPIN5 (1 << 5)
+#define GPIOPIN6 (1 << 6)
+#define GPIOPIN7 (1 << 7)
+#define GPIOPIN8 (1 << 8)
+#define GPIOPIN9 (1 << 9)
+#define GPIOPIN10 (1 << 10)
+#define GPIOPIN11 (1 << 11)
+#define GPIOPIN12 (1 << 12)
+#define GPIOPIN13 (1 << 13)
+#define GPIOPIN14 (1 << 14)
+#define GPIOPIN15 (1 << 15)
+#define GPIOPIN16 (1 << 16)
+#define GPIOPIN17 (1 << 17)
+#define GPIOPIN18 (1 << 18)
+#define GPIOPIN19 (1 << 19)
+#define GPIOPIN20 (1 << 20)
+#define GPIOPIN21 (1 << 21)
+#define GPIOPIN22 (1 << 22)
+#define GPIOPIN23 (1 << 23)
+#define GPIOPIN24 (1 << 24)
+#define GPIOPIN25 (1 << 25)
+#define GPIOPIN26 (1 << 26)
+#define GPIOPIN27 (1 << 27)
+#define GPIOPIN28 (1 << 28)
+#define GPIOPIN29 (1 << 29)
+#define GPIOPIN30 (1 << 30)
+#define GPIOPIN31 (1 << 31)
+
+/* --- GPIO registers ------------------------------------------------------ */
+
+/* GPIO data direction register (GPIOn_DIR) */
+#define GPIO_DIR(port) MMIO32(port + 0x00)
+#define GPIO0_DIR GPIO_DIR(GPIO0)
+#define GPIO1_DIR GPIO_DIR(GPIO1)
+#define GPIO2_DIR GPIO_DIR(GPIO2)
+#define GPIO3_DIR GPIO_DIR(GPIO3)
+#define GPIO4_DIR GPIO_DIR(GPIO4)
+
+/* GPIO fast mask register (GPIOn_DIR) */
+#define GPIO_MASK(port) MMIO32(port + 0x10)
+#define GPIO0_MASK GPIO_MASK(GPIO0)
+#define GPIO1_MASK GPIO_MASK(GPIO1)
+#define GPIO2_MASK GPIO_MASK(GPIO2)
+#define GPIO3_MASK GPIO_MASK(GPIO3)
+#define GPIO4_MASK GPIO_MASK(GPIO4)
+
+/* GPIO port pin value register (GPIOn_PIN) */
+#define GPIO_PIN(port) MMIO32(port + 0x14)
+#define GPIO0_PIN GPIO_PIN(GPIO0)
+#define GPIO1_PIN GPIO_PIN(GPIO1)
+#define GPIO2_PIN GPIO_PIN(GPIO2)
+#define GPIO3_PIN GPIO_PIN(GPIO3)
+#define GPIO4_PIN GPIO_PIN(GPIO4)
+
+/* GPIO port output set register (GPIOn_SET) */
+#define GPIO_SET(port) MMIO32(port + 0x18)
+#define GPIO0_SET GPIO_SET(GPIO0)
+#define GPIO1_SET GPIO_SET(GPIO1)
+#define GPIO2_SET GPIO_SET(GPIO2)
+#define GPIO3_SET GPIO_SET(GPIO3)
+#define GPIO4_SET GPIO_SET(GPIO4)
+
+/* GPIO port output clear register (GPIOn_CLR) */
+#define GPIO_CLR(port) MMIO32(port + 0x1C)
+#define GPIO0_CLR GPIO_CLR(GPIO0)
+#define GPIO1_CLR GPIO_CLR(GPIO1)
+#define GPIO2_CLR GPIO_CLR(GPIO2)
+#define GPIO3_CLR GPIO_CLR(GPIO3)
+#define GPIO4_CLR GPIO_CLR(GPIO4)
+
+/* GPIO interrupt register map */
+/* Interrupt enable rising edge */
+#define GPIO0_IER MMIO32(GPIOINTERRPUT_BASE + 0x90)
+#define GPIO2_IER MMIO32(GPIOINTERRPUT_BASE + 0xB0)
+
+/* Interrupt enable falling edge */
+#define GPIO0_IEF MMIO32(GPIOINTERRPUT_BASE + 0x94)
+#define GPIO2_IEF MMIO32(GPIOINTERRPUT_BASE + 0xB4)
+
+/* Interrupt status rising edge */
+#define GPIO0_ISR MMIO32(GPIOINTERRPUT_BASE + 0x84)
+#define GPIO2_ISR MMIO32(GPIOINTERRPUT_BASE + 0xA4)
+
+/* Interrupt status falling edge */
+#define GPIO0_ISF MMIO32(GPIOINTERRPUT_BASE + 0x88)
+#define GPIO2_ISF MMIO32(GPIOINTERRPUT_BASE + 0xA8)
+
+/* Interrupt clear */
+#define GPIO0_IC MMIO32(GPIOINTERRPUT_BASE + 0x8C)
+#define GPIO1_IC MMIO32(GPIOINTERRPUT_BASE + 0xAC)
+
+/* Overall interrupt status */
+#define GPIO_IS MMIO32(GPIOINTERRPUT_BASE + 0x80)
+
+void gpio_set(u32 gpioport, u32 gpios);
+void gpio_clear(u32 gpioport, u32 gpios);
+
+#endif
diff --git a/include/libopencm3/lpc17xx/memorymap.h b/include/libopencm3/lpc17xx/memorymap.h
new file mode 100644
index 0000000..1114442
--- /dev/null
+++ b/include/libopencm3/lpc17xx/memorymap.h
@@ -0,0 +1,65 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LPC17XX_MEMORYMAP_H
+#define LPC17XX_MEMORYMAP_H
+
+#include <libopencm3/cm3/common.h>
+
+/* --- LPC17XX specific peripheral definitions ----------------------------- */
+
+/* Memory map for all busses */
+#define PERIPH_BASE_APB0 0x40000000
+#define PERIPH_BASE_APB1 0x40080000
+#define PERIPH_BASE_AHB 0x20000000
+
+/* Register boundary addresses */
+
+/* APB0 */
+#define WDT_BASE (PERIPH_BASE_APB0 + 0x00000)
+#define TIMER0_BASE (PERIPH_BASE_APB0 + 0x04000)
+#define TIMER1_BASE (PERIPH_BASE_APB0 + 0x08000)
+#define UART0_BASE (PERIPH_BASE_APB0 + 0x0c000)
+#define UART1_BASE (PERIPH_BASE_APB0 + 0x10000)
+/* PERIPH_BASE_APB0 + 0X14000 (0x4001 4000 - 0x4001 7FFF): Reserved */
+#define PWM1_BASE (PERIPH_BASE_APB0 + 0x18000)
+#define I2C0_BASE (PERIPH_BASE_APB0 + 0x1c000)
+#define SPI_BASE (PERIPH_BASE_APB0 + 0x20000)
+#define RTC_BASE (PERIPH_BASE_APB0 + 0x24000)
+#define GPIOINTERRPUT_BASE (PERIPH_BASE_APB0 + 0x28000)
+#define PINCONNECT_BASE (PERIPH_BASE_APB0 + 0x2c000)
+#define SSP1_BASE (PERIPH_BASE_APB0 + 0x30000)
+#define ADC_BASE (PERIPH_BASE_APB0 + 0x34000)
+#define CANAFRAM_BASE (PERIPH_BASE_APB0 + 0x38000)
+#define CANAFREG_BASE (PERIPH_BASE_APB0 + 0x3C000)
+#define CANCOMMONREG_BASE (PERIPH_BASE_APB0 + 0x40000)
+#define CAN1_BASE (PERIPH_BASE_APB0 + 0x44000)
+#define CAN2_BASE (PERIPH_BASE_APB0 + 0x48000)
+/* PERIPH_BASE_APB0 + 0X4C000 (0x4004 C000 - 0x4005 BFFF): Reserved */
+#define I2C1_BASE (PERIPH_BASE_APB0 + 0x5C000)
+/* PERIPH_BASE_APB0 + 0X60000 (0x6000 0000 - 0x4007 BFFF): Reserved */
+
+/* AHB */
+#define GPIO_PIO0_BASE (PERIPH_BASE_AHB + 0x9c000)
+#define GPIO_PIO1_BASE (PERIPH_BASE_AHB + 0x9c020)
+#define GPIO_PIO2_BASE (PERIPH_BASE_AHB + 0x9c040)
+#define GPIO_PIO3_BASE (PERIPH_BASE_AHB + 0x9c060)
+#define GPIO_PIO4_BASE (PERIPH_BASE_AHB + 0x9c080)
+
+#endif
diff --git a/include/libopencm3/stm32/f1/adc.h b/include/libopencm3/stm32/f1/adc.h
index a4eb19c..563e75d 100644
--- a/include/libopencm3/stm32/f1/adc.h
+++ b/include/libopencm3/stm32/f1/adc.h
@@ -150,77 +150,194 @@
/* --- ADC_CR1 values ------------------------------------------------------ */
+/* AWDEN: Analog watchdog enable on regular channels */
#define ADC_CR1_AWDEN (1 << 23)
+
+/* JAWDEN: Analog watchdog enable on injected channels */
#define ADC_CR1_JAWDEN (1 << 22)
-#define ADC_CR1_DUALMOD_LSB 16
-#define ADC_CR1_DUALMOD_MSK (0xf << ADC_DUALMOD_LSB) /* ADC1 only */
-#define ADC_CR1_DISCNUM_LSB 13
-#define ADC_CR1_DISCNUM_MSK (0x7 << ADC_DISCNUM_LSB)
+
+/* Note: Bits [21:20] are reserved, and must be kept at reset value. */
+
+/* DUALMOD[3:0]: Dual mode selection. (ADC1 only) */
+/* Legend:
+ * IND: Independent mode.
+ * CRSISM: Combined regular simultaneous + injected simultaneous mode.
+ * CRSATM: Combined regular simultaneous + alternate trigger mode.
+ * CISFIM: Combined injected simultaneous + fast interleaved mode.
+ * CISSIM: Combined injected simultaneous + slow interleaved mode.
+ * ISM: Injected simultaneous mode only.
+ * RSM: Regular simultaneous mode only.
+ * FIM: Fast interleaved mode only.
+ * SIM: Slow interleaved mode only.
+ * ATM: Alternate trigger mode only.
+ */
+#define ADC_CR1_DUALMOD_IND (0x0 << 16)
+#define ADC_CR1_DUALMOD_CRSISM (0x1 << 16)
+#define ADC_CR1_DUALMOD_CRSATM (0x2 << 16)
+#define ADC_CR1_DUALMOD_CISFIM (0x3 << 16)
+#define ADC_CR1_DUALMOD_CISSIM (0x4 << 16)
+#define ADC_CR1_DUALMOD_ISM (0x5 << 16)
+#define ADC_CR1_DUALMOD_RSM (0x6 << 16)
+#define ADC_CR1_DUALMOD_FIM (0x7 << 16)
+#define ADC_CR1_DUALMOD_SIM (0x8 << 16)
+#define ADC_CR1_DUALMOD_ATM (0x9 << 16)
+#define ADC_CR1_DUALMOD_MASK (0xF << 16)
+#define ADC_CR1_DUALMOD_SHIFT 16
+
+/* DISCNUM[2:0]: Discontinous mode channel count. */
+#define ADC_CR1_DISCNUM_1CHANNELS (0x0 << 13)
+#define ADC_CR1_DISCNUM_2CHANNELS (0x1 << 13)
+#define ADC_CR1_DISCNUM_3CHANNELS (0x2 << 13)
+#define ADC_CR1_DISCNUM_4CHANNELS (0x3 << 13)
+#define ADC_CR1_DISCNUM_5CHANNELS (0x4 << 13)
+#define ADC_CR1_DISCNUM_6CHANNELS (0x5 << 13)
+#define ADC_CR1_DISCNUM_7CHANNELS (0x6 << 13)
+#define ADC_CR1_DISCNUM_8CHANNELS (0x7 << 13)
+#define ADC_CR1_DISCNUM_MASK (0x7 << 13)
+#define ADC_CR1_DISCNUM_SHIFT 13
+
+/* JDISCEN: Discontinous mode on injected channels. */
#define ADC_CR1_JDISCEN (1 << 12)
+
+/* DISCEN: Discontinous mode on regular channels. */
#define ADC_CR1_DISCEN (1 << 11)
+
+/* JAUTO: Automatic Injection Group conversion. */
#define ADC_CR1_JAUTO (1 << 10)
+
+/* AWDSGL: Enable the watchdog on a single channel in scan mode. */
#define ADC_CR1_AWDSGL (1 << 9)
+
+/* SCAN: Scan mode. */
#define ADC_CR1_SCAN (1 << 8)
+
+/* JEOCIE: Interrupt enable for injected channels. */
#define ADC_CR1_JEOCIE (1 << 7)
+
+/* AWDIE: Analog watchdog interrupt enable. */
#define ADC_CR1_AWDIE (1 << 6)
+
+/* EOCIE: Interrupt enable EOC. */
#define ADC_CR1_EOCIE (1 << 5)
-#define ADC_CR1_AWDCH_LSB 0
-#define ADC_CR1_AWDCH_MSK (0x1f << ADC_AWDCH_LSB)
+
+/* AWDCH[4:0]: Analog watchdog channel bits. (Up to 17 other values reserved) */
+/* Notes:
+ * ADC1: Analog channel 16 and 17 are internally connected to the temperature
+ * sensor and V_REFINT, respectively.
+ * ADC2: Analog channel 16 and 17 are internally connected to V_SS.
+ * ADC3: Analog channel 9, 14, 15, 16 and 17 are internally connected to V_SS.
+ */
+#define ADC_CR1_AWDCH_CHANNEL0 (0x00 << 0)
+#define ADC_CR1_AWDCH_CHANNEL1 (0x01 << 0)
+#define ADC_CR1_AWDCH_CHANNEL2 (0x02 << 0)
+#define ADC_CR1_AWDCH_CHANNEL3 (0x03 << 0)
+#define ADC_CR1_AWDCH_CHANNEL4 (0x04 << 0)
+#define ADC_CR1_AWDCH_CHANNEL5 (0x05 << 0)
+#define ADC_CR1_AWDCH_CHANNEL6 (0x06 << 0)
+#define ADC_CR1_AWDCH_CHANNEL7 (0x07 << 0)
+#define ADC_CR1_AWDCH_CHANNEL8 (0x08 << 0)
+#define ADC_CR1_AWDCH_CHANNEL9 (0x09 << 0)
+#define ADC_CR1_AWDCH_CHANNEL10 (0x0A << 0)
+#define ADC_CR1_AWDCH_CHANNEL11 (0x0B << 0)
+#define ADC_CR1_AWDCH_CHANNEL12 (0x0C << 0)
+#define ADC_CR1_AWDCH_CHANNEL13 (0x0D << 0)
+#define ADC_CR1_AWDCH_CHANNEL14 (0x0E << 0)
+#define ADC_CR1_AWDCH_CHANNEL15 (0x0F << 0)
+#define ADC_CR1_AWDCH_CHANNEL16 (0x10 << 0)
+#define ADC_CR1_AWDCH_CHANNEL17 (0x11 << 0)
+#define ADC_CR1_AWDCH_MASK (0x1F << 0)
+#define ADC_CR1_AWDCH_SHIFT 0
/* --- ADC_CR2 values ------------------------------------------------------ */
-#define ADC_CR2_TSVREFE (1 << 23) /* ADC1 only! */
+/* TSVREFE: Temperature sensor and V_REFINT enable. (ADC1 only!) */
+#define ADC_CR2_TSVREFE (1 << 23)
+
+/* SWSTART: Start conversion of regular channels. */
#define ADC_CR2_SWSTART (1 << 22)
+
+/* JSWSTART: Start conversion of injected channels. */
#define ADC_CR2_JSWSTART (1 << 21)
+
+/* EXTTRIG: External trigger conversion mode for regular channels. */
#define ADC_CR2_EXTTRIG (1 << 20)
-#define ADC_CR2_EXTSEL_LSB 17
-#define ADC_CR2_EXTSEL_MSK (0x7 << ADC_EXTSEL_LSB)
+
+/* EXTSEL[2:0]: External event select for regular group. */
/* The following are only valid for ADC1 and ADC2. */
-#define ADC_CR2_EXTSEL_TIM1_CC1 0x0
-#define ADC_CR2_EXTSEL_TIM1_CC2 0x1
-#define ADC_CR2_EXTSEL_TIM1_CC3 0x2
-#define ADC_CR2_EXTSEL_TIM2_CC2 0x3
-#define ADC_CR2_EXTSEL_TIM3_TRGO 0x4
-#define ADC_CR2_EXTSEL_TIM4_CC4 0x5
-#define ADC_CR2_EXTSEL_EXTI11 0x6
-#define ADC_CR2_EXTSEL_SWSTART 0x7
+#define ADC_CR2_EXTSEL_TIM1_CC1 (0x0 << 17)
+#define ADC_CR2_EXTSEL_TIM1_CC2 (0x1 << 17)
+#define ADC_CR2_EXTSEL_TIM1_CC3 (0x2 << 17)
+#define ADC_CR2_EXTSEL_TIM2_CC2 (0x3 << 17)
+#define ADC_CR2_EXTSEL_TIM3_TRGO (0x4 << 17)
+#define ADC_CR2_EXTSEL_TIM4_CC4 (0x5 << 17)
+#define ADC_CR2_EXTSEL_EXTI11 (0x6 << 17)
+#define ADC_CR2_EXTSEL_SWSTART (0x7 << 17)
/* The following are only valid for ADC3 */
-#define ADC_CR2_EXTSEL_TIM3_CC1 0x0
-#define ADC_CR2_EXTSEL_TIM2_CC3 0x1
-#define ADC_CR2_EXTSEL_TIM8_CC1 0x3
-#define ADC_CR2_EXTSEL_TIM8_TRGO 0x4
-#define ADC_CR2_EXTSEL_TIM5_CC1 0x5
-#define ADC_CR2_EXTSEL_TIM5_CC3 0x6
-
-/* Bit 16: reserved, must be kept cleared */
+#define ADC_CR2_EXTSEL_TIM3_CC1 (0x0 << 17)
+#define ADC_CR2_EXTSEL_TIM2_CC3 (0x1 << 17)
+#define ADC_CR2_EXTSEL_TIM8_CC1 (0x3 << 17)
+#define ADC_CR2_EXTSEL_TIM8_TRGO (0x4 << 17)
+#define ADC_CR2_EXTSEL_TIM5_CC1 (0x5 << 17)
+#define ADC_CR2_EXTSEL_TIM5_CC3 (0x6 << 17)
+
+#define ADC_CR2_EXTSEL_MASK (0x7 << 17)
+#define ADC_CR2_EXTSEL_SHIFT 17
+
+/* Note: Bit 16 is reserved, must be kept at reset value. */
+
+/* JEXTTRIG: External trigger conversion mode for injected channels. */
#define ADC_CR2_JEXTTRIG (1 << 15)
-#define ADC_CR2_JEXTSEL_LSB 12
-#define ADC_CR2_JEXTSEL_MSK (0x7 << ADC_JEXTSEL_LSB)
+
+/* JEXTSEL[2:0]: External event selection for injected group. */
/* The following are only valid for ADC1 and ADC2. */
-#define ADC_CR2_JEXTSEL_TIM1_TRGO 0x0
-#define ADC_CR2_JEXTSEL_TIM1_CC4 0x1
-#define ADC_CR2_JEXTSEL_TIM2_TRGO 0x2
-#define ADC_CR2_JEXTSEL_TIM2_CC1 0x3
-#define ADC_CR2_JEXTSEL_TIM3_CC4 0x4
-#define ADC_CR2_JEXTSEL_TIM4_TRGO 0x5
-#define ADC_CR2_JEXTSEL_EXTI15 0x6
-#define ADC_CR2_JEXTSEL_JSWSTART 0x7
+#define ADC_CR2_JEXTSEL_TIM1_TRGO (0x0 << 12)
+#define ADC_CR2_JEXTSEL_TIM1_CC4 (0x1 << 12)
+#define ADC_CR2_JEXTSEL_TIM2_TRGO (0x2 << 12)
+#define ADC_CR2_JEXTSEL_TIM2_CC1 (0x3 << 12)
+#define ADC_CR2_JEXTSEL_TIM3_CC4 (0x4 << 12)
+#define ADC_CR2_JEXTSEL_TIM4_TRGO (0x5 << 12)
+#define ADC_CR2_JEXTSEL_EXTI15 (0x6 << 12)
+#define ADC_CR2_JEXTSEL_JSWSTART (0x7 << 12) /* Software start. */
/* The following are the different meanings for ADC3 only. */
-#define ADC_CR2_JEXTSEL_TIM4_CC3 0x2
-#define ADC_CR2_JEXTSEL_TIM8_CC2 0x3
-#define ADC_CR2_JEXTSEL_TIM8_CC4 0x4
-#define ADC_CR2_JEXTSEL_TIM5_TRGO 0x5
-#define ADC_CR2_JEXTSEL_TIM5_CC4 0x6
-
+#define ADC_CR2_JEXTSEL_TIM4_CC3 (0x2 << 12)
+#define ADC_CR2_JEXTSEL_TIM8_CC2 (0x3 << 12)
+#define ADC_CR2_JEXTSEL_TIM8_CC4 (0x4 << 12)
+#define ADC_CR2_JEXTSEL_TIM5_TRGO (0x5 << 12)
+#define ADC_CR2_JEXTSEL_TIM5_CC4 (0x6 << 12)
+
+#define ADC_CR2_JEXTSEL_MASK (0x7 << 12)
+#define ADC_CR2_JEXTSEL_SHIFT 12
+
+/* ALIGN: Data alignement. */
+#define ADC_CR2_ALIGN_RIGHT (0 << 11)
+#define ADC_CR2_ALIGN_LEFT (1 << 11)
#define ADC_CR2_ALIGN (1 << 11)
-#define ADC_CR2_DMA (1 << 8) /* ADC 1 & 3 only! */
-/* Bits [7:4] have to be kept 0. */
+
+/* Note: Bits [10:9] are reserved and must be kept at reset value. */
+
+/* DMA: Direct memory access mode. (ADC1 and ADC3 only!) */
+#define ADC_CR2_DMA (1 << 8)
+
+/* Note: Bits [7:4] are reserved and must be kept at reset value. */
+
+/* RSTCAL: Reset calibration. */
#define ADC_CR2_RSTCAL (1 << 3)
+
+/* CAL: A/D Calibration. */
#define ADC_CR2_CAL (1 << 2)
+
+/* CONT: Continous conversion. */
#define ADC_CR2_CONT (1 << 1)
-#define ADC_CR2_ADON (1 << 0) /* Must be separately written. */
+
+/* ADON: A/D converter On/Off. */
+/* Note: If any other bit in this register apart from ADON is changed at the
+ * same time, then conversion is not triggered. This is to prevent triggering
+ * an erroneous conversion.
+ * Conclusion: Must be separately written.
+ */
+#define ADC_CR2_ADON (1 << 0)
/* --- ADC_SMPR1 values ---------------------------------------------------- */
@@ -394,9 +511,9 @@ void adc_enable_temperature_sensor(u32 adc);
void adc_disable_temperature_sensor(u32 adc);
void adc_start_conversion_regular(u32 adc);
void adc_start_conversion_injected(u32 adc);
-void adc_enable_external_trigger_regular(u32 adc, u8 trigger);
+void adc_enable_external_trigger_regular(u32 adc, u32 trigger);
void adc_disable_external_trigger_regular(u32 adc);
-void adc_enable_external_trigger_injected(u32 adc, u8 trigger);
+void adc_enable_external_trigger_injected(u32 adc, u32 trigger);
void adc_disable_external_trigger_injected(u32 adc);
void adc_set_left_aligned(u32 adc);
void adc_set_right_aligned(u32 adc);
diff --git a/include/libopencm3/stm32/f1/dma.h b/include/libopencm3/stm32/f1/dma.h
index 2a3d29c..7f9abad 100644
--- a/include/libopencm3/stm32/f1/dma.h
+++ b/include/libopencm3/stm32/f1/dma.h
@@ -127,7 +127,7 @@
/* TEIF: Transfer error interrupt flag */
#define DMA_ISR_TEIF_BIT (1 << 3)
-#define DMA_ISR_TEIF(channel) (DMA_ISR_TEIF_BIT << (4 * (channel) -1))
+#define DMA_ISR_TEIF(channel) (DMA_ISR_TEIF_BIT << (4 * ((channel) -1)))
#define DMA_ISR_TEIF1 DMA_ISR_TEIF(DMA_CHANNEL1)
#define DMA_ISR_TEIF2 DMA_ISR_TEIF(DMA_CHANNEL2)
@@ -139,7 +139,7 @@
/* HTIF: Half transfer interrupt flag */
#define DMA_ISR_HTIF_BIT (1 << 2)
-#define DMA_ISR_HTIF(channel) (DMA_ISR_HTIF_BIT << (4 * (channel) -1))
+#define DMA_ISR_HTIF(channel) (DMA_ISR_HTIF_BIT << (4 * ((channel) -1)))
#define DMA_ISR_HTIF1 DMA_ISR_HTIF(DMA_CHANNEL1)
#define DMA_ISR_HTIF2 DMA_ISR_HTIF(DMA_CHANNEL2)
@@ -151,7 +151,7 @@
/* TCIF: Transfer complete interrupt flag */
#define DMA_ISR_TCIF_BIT (1 << 1)
-#define DMA_ISR_TCIF(channel) (DMA_ISR_TCIF_BIT << (4 * (channel) -1))
+#define DMA_ISR_TCIF(channel) (DMA_ISR_TCIF_BIT << (4 * ((channel) -1)))
#define DMA_ISR_TCIF1 DMA_ISR_TCIF(DMA_CHANNEL1)
#define DMA_ISR_TCIF2 DMA_ISR_TCIF(DMA_CHANNEL2)
@@ -163,7 +163,7 @@
/* GIF: Global interrupt flag */
#define DMA_ISR_GIF_BIT (1 << 0)
-#define DMA_ISR_GIF(channel) (DMA_ISR_GIF_BIT << (4 * (channel) -1))
+#define DMA_ISR_GIF(channel) (DMA_ISR_GIF_BIT << (4 * ((channel) -1)))
#define DMA_ISR_GIF1 DMA_ISR_GIF(DMA_CHANNEL1)
#define DMA_ISR_GIF2 DMA_ISR_GIF(DMA_CHANNEL2)
@@ -177,7 +177,7 @@
/* CTEIF: Transfer error clear */
#define DMA_IFCR_CTEIF_BIT (1 << 3)
-#define DMA_IFCR_CTEIF(channel) (DMA_IFCR_CTEIF_BIT << (4 * (channel) -1))
+#define DMA_IFCR_CTEIF(channel) (DMA_IFCR_CTEIF_BIT << (4 * ((channel) -1)))
#define DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF(DMA_CHANNEL1)
#define DMA_IFCR_CTEIF2 DMA_IFCR_CTEIF(DMA_CHANNEL2)
@@ -189,7 +189,7 @@
/* CHTIF: Half transfer clear */
#define DMA_IFCR_CHTIF_BIT (1 << 2)
-#define DMA_IFCR_CHTIF(channel) (DMA_IFCR_CHTIF_BIT << (4 * (channel) -1))
+#define DMA_IFCR_CHTIF(channel) (DMA_IFCR_CHTIF_BIT << (4 * ((channel) -1)))
#define DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF(DMA_CHANNEL1)
#define DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF(DMA_CHANNEL2)
@@ -201,7 +201,7 @@
/* CTCIF: Transfer complete clear */
#define DMA_IFCR_CTCIF_BIT (1 << 1)
-#define DMA_IFCR_CTCIF(channel) (DMA_IFCR_CTCIF_BIT << (4 * (channel) -1))
+#define DMA_IFCR_CTCIF(channel) (DMA_IFCR_CTCIF_BIT << (4 * ((channel) -1)))
#define DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF(DMA_CHANNEL1)
#define DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF(DMA_CHANNEL2)
@@ -213,7 +213,7 @@
/* CGIF: Global interrupt clear */
#define DMA_IFCR_CGIF_BIT (1 << 0)
-#define DMA_IFCR_CGIF(channel) (DMA_IFCR_CGIF_BIT << (4 * (channel) -1))
+#define DMA_IFCR_CGIF(channel) (DMA_IFCR_CGIF_BIT << (4 * ((channel) -1)))
#define DMA_IFCR_CGIF1 DMA_IFCR_CGIF(DMA_CHANNEL1)
#define DMA_IFCR_CGIF2 DMA_IFCR_CGIF(DMA_CHANNEL2)
@@ -256,10 +256,10 @@
#define DMA_CCR_MSIZE_SHIFT 10
/* PSIZE[9:8]: Peripheral size */
-#define DMA_CCR_PSIZE_8BIT (0x0 << 10)
-#define DMA_CCR_PSIZE_16BIT (0x1 << 10)
-#define DMA_CCR_PSIZE_32BIT (0x2 << 10)
-#define DMA_CCR_PSIZE_MASK (0x2 << 10)
+#define DMA_CCR_PSIZE_8BIT (0x0 << 8)
+#define DMA_CCR_PSIZE_16BIT (0x1 << 8)
+#define DMA_CCR_PSIZE_32BIT (0x2 << 8)
+#define DMA_CCR_PSIZE_MASK (0x2 << 8)
#define DMA_CCR_PSIZE_SHIFT 8
/* MINC: Memory increment mode */
diff --git a/include/libopencm3/stm32/f1/gpio.h b/include/libopencm3/stm32/f1/gpio.h
index 440b71c..e4e11be 100644
--- a/include/libopencm3/stm32/f1/gpio.h
+++ b/include/libopencm3/stm32/f1/gpio.h
@@ -701,6 +701,7 @@
/* 27 reserved */
/* SWJ_CFG[2:0]: Serial wire JTAG configuration */
+#define AFIO_MAPR_SWJ_MASK (0x7 << 24)
#define AFIO_MAPR_SWJ_CFG_FULL_SWJ (0x0 << 24)
#define AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST (0x1 << 24)
#define AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON (0x2 << 24)
diff --git a/include/libopencm3/stm32/f1/memorymap.h b/include/libopencm3/stm32/f1/memorymap.h
index d2c3651..f8528d4 100644
--- a/include/libopencm3/stm32/f1/memorymap.h
+++ b/include/libopencm3/stm32/f1/memorymap.h
@@ -25,7 +25,7 @@
/* --- STM32 specific peripheral definitions ------------------------------- */
/* Memory map for all busses */
-#define PERIPH_BASE 0x40000000
+#define PERIPH_BASE ((u32)0x40000000)
#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)
#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)
#define PERIPH_BASE_AHB (PERIPH_BASE + 0x18000)
diff --git a/include/libopencm3/stm32/f2/gpio.h b/include/libopencm3/stm32/f2/gpio.h
index 63d2880..1a9fd0f 100644
--- a/include/libopencm3/stm32/f2/gpio.h
+++ b/include/libopencm3/stm32/f2/gpio.h
@@ -232,7 +232,7 @@
/* See Datasheet Table 6 (pg. 48) for alternate function mappings. */
#define GPIO_AFR(n, af) (af << ((n) * 4))
-#define GPIO_AFR_MASK(n) ~(0xf << ((n) * 4))
+#define GPIO_AFR_MASK(n) (0xf << ((n) * 4))
#define GPIO_AF0 0x0
#define GPIO_AF1 0x1
#define GPIO_AF2 0x2
diff --git a/include/libopencm3/stm32/f4/gpio.h b/include/libopencm3/stm32/f4/gpio.h
index 4981c2a..a5b4361 100644
--- a/include/libopencm3/stm32/f4/gpio.h
+++ b/include/libopencm3/stm32/f4/gpio.h
@@ -232,7 +232,7 @@
/* See Datasheet Table 6 (pg. 48) for alternate function mappings. */
#define GPIO_AFR(n, af) (af << ((n) * 4))
-#define GPIO_AFR_MASK(n) ~(0xf << ((n) * 4))
+#define GPIO_AFR_MASK(n) (0xf << ((n) * 4))
#define GPIO_AF0 0x0
#define GPIO_AF1 0x1
#define GPIO_AF2 0x2
diff --git a/include/libopencm3/stm32/fsmc.h b/include/libopencm3/stm32/fsmc.h
index e945123..3e35538 100644
--- a/include/libopencm3/stm32/fsmc.h
+++ b/include/libopencm3/stm32/fsmc.h
@@ -25,9 +25,6 @@
/* --- Convenience macros -------------------------------------------------- */
-/* TODO: Move to memorymap.h? */
-#define FSMC_BASE 0xa0000000
-
#define FSMC_BANK1_BASE 0x60000000 /* NOR / PSRAM */
#define FSMC_BANK2_BASE 0x70000000 /* NAND flash */
#define FSMC_BANK3_BASE 0x80000000 /* NAND flash */
@@ -142,26 +139,39 @@
/* Bits [31:30]: Reserved. */
+/* Same for read and write */
+#define FSMC_BTx_ACCMOD_A (0)
+#define FSMC_BTx_ACCMOD_B (1)
+#define FSMC_BTx_ACCMOD_C (2)
+#define FSMC_BTx_ACCMOD_D (3)
+
/* ACCMOD[29:28]: Access mode */
#define FSMC_BTR_ACCMOD (1 << 28)
+#define FSMC_BTR_ACCMODx(x) (((x) & 0x03) << 28)
/* DATLAT[27:24]: Data latency (for synchronous burst NOR flash) */
#define FSMC_BTR_DATLAT (1 << 24)
+#define FSMC_BTR_DATLATx(x) (((x) & 0x0f) << 24)
/* CLKDIV[23:20]: Clock divide ratio (for CLK signal) */
#define FSMC_BTR_CLKDIV (1 << 20)
+#define FSMC_BTR_CLKDIVx(x) (((x) & 0x0f) << 20)
/* BUSTURN[19:16]: Bus turnaround phase duration */
#define FSMC_BTR_BUSTURN (1 << 16)
+#define FSMC_BTR_BUSTURNx(x) (((x) & 0x0f) << 16)
/* DATAST[15:8]: Data-phase duration */
#define FSMC_BTR_DATAST (1 << 8)
+#define FSMC_BTR_DATASTx(x) (((x) & 0xff) << 8)
/* ADDHLD[7:4]: Address-hold phase duration */
#define FSMC_BTR_ADDHLD (1 << 4)
+#define FSMC_BTR_ADDHLDx(x) (((x) & 0x0f) << 4)
/* ADDSET[3:0]: Address setup phase duration */
#define FSMC_BTR_ADDSET (1 << 0)
+#define FSMC_BTR_ADDSETx(x) (((x) & 0x0f) << 0)
/* --- FSMC_BWTRx values --------------------------------------------------- */
diff --git a/lib/lm3s/Makefile b/lib/lm3s/Makefile
index 93a67ad..7ebc365 100644
--- a/lib/lm3s/Makefile
+++ b/lib/lm3s/Makefile
@@ -3,18 +3,18 @@
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
-## This program is free software: you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
-## This program is distributed in the hope that it will be useful,
+## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
+## GNU Lesser General Public License for more details.
##
-## You should have received a copy of the GNU General Public License
-## along with this program. If not, see <http://www.gnu.org/licenses/>.
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_lm3s
diff --git a/lib/lpc13xx/Makefile b/lib/lpc13xx/Makefile
index 04e33c8..e4f2096 100644
--- a/lib/lpc13xx/Makefile
+++ b/lib/lpc13xx/Makefile
@@ -3,18 +3,18 @@
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
-## This program is free software: you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
-## This program is distributed in the hope that it will be useful,
+## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
+## GNU Lesser General Public License for more details.
##
-## You should have received a copy of the GNU General Public License
-## along with this program. If not, see <http://www.gnu.org/licenses/>.
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_lpc13xx
diff --git a/lib/lpc17xx/Makefile b/lib/lpc17xx/Makefile
new file mode 100644
index 0000000..c29f690
--- /dev/null
+++ b/lib/lpc17xx/Makefile
@@ -0,0 +1,58 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+LIBNAME = libopencm3_lpc17xx
+
+PREFIX ?= arm-none-eabi
+#PREFIX ?= arm-elf
+CC = $(PREFIX)-gcc
+AR = $(PREFIX)-ar
+CFLAGS = -O0 -g -Wall -Wextra -I../../include -fno-common \
+ -mcpu=cortex-m3 -mthumb -Wstrict-prototypes \
+ -ffunction-sections -fdata-sections -MD
+# ARFLAGS = rcsv
+ARFLAGS = rcs
+OBJS = gpio.o vector.o
+
+# VPATH += ../usb
+
+# Be silent per default, but 'make V=1' will show all compiler calls.
+ifneq ($(V),1)
+Q := @
+endif
+
+all: $(LIBNAME).a
+
+$(LIBNAME).a: $(OBJS)
+ @printf " AR $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(AR) $(ARFLAGS) $@ $^
+
+%.o: %.c
+ @printf " CC $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(CC) $(CFLAGS) -o $@ -c $<
+
+clean:
+ @printf " CLEAN lib/lpc17xx\n"
+ $(Q)rm -f *.o *.d
+ $(Q)rm -f $(LIBNAME).a
+
+.PHONY: clean
+
+-include $(OBJS:.o=.d)
+
diff --git a/lib/lpc17xx/gpio.c b/lib/lpc17xx/gpio.c
new file mode 100644
index 0000000..6c44081
--- /dev/null
+++ b/lib/lpc17xx/gpio.c
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/lpc17xx/gpio.h>
+
+void gpio_set(u32 gpioport, u32 gpios)
+{
+ GPIO_SET(gpioport) = gpios;
+}
+
+void gpio_clear(u32 gpioport, u32 gpios)
+{
+ GPIO_CLR(gpioport) = gpios;
+}
diff --git a/lib/lpc17xx/libopencm3_lpc17xx.ld b/lib/lpc17xx/libopencm3_lpc17xx.ld
new file mode 100644
index 0000000..30a2c0f
--- /dev/null
+++ b/lib/lpc17xx/libopencm3_lpc17xx.ld
@@ -0,0 +1,73 @@
+
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Generic linker script for LPC13XX targets using libopencm3. */
+
+/* Memory regions must be defined in the ld script which includes this one. */
+
+/* Enforce emmition of the vector table. */
+EXTERN (vector_table)
+
+/* Define the entry point of the output file. */
+ENTRY(reset_handler)
+
+/* Define sections. */
+SECTIONS
+{
+ . = ORIGIN(rom);
+
+ .text : {
+ *(.vectors) /* Vector table */
+ *(.text*) /* Program code */
+ *(.rodata*) /* Read-only data */
+ _etext = .;
+ } >rom
+
+ . = ORIGIN(ram);
+
+ .data : {
+ _data = .;
+ *(.data*) /* Read-write initialized data */
+ _edata = .;
+ } >ram AT >rom
+
+ .bss : {
+ *(.bss*) /* Read-write zero initialized data */
+ *(COMMON)
+ _ebss = .;
+ } >ram AT >rom
+
+ /*
+ * The .eh_frame section appears to be used for C++ exception handling.
+ * You may need to fix this if you're using C++.
+ */
+ /DISCARD/ : { *(.eh_frame) }
+
+ /*
+ * Another section used by C++ stuff, appears when using newlib with
+ * 64bit (long long) printf support - discard it for now.
+ */
+ /DISCARD/ : { *(.ARM.exidx) }
+
+ end = .;
+}
+
+PROVIDE(_stack = ORIGIN(ram) + LENGTH(ram));
+
diff --git a/lib/lpc17xx/vector.c b/lib/lpc17xx/vector.c
new file mode 100644
index 0000000..016db7a
--- /dev/null
+++ b/lib/lpc17xx/vector.c
@@ -0,0 +1,94 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define WEAK __attribute__ ((weak))
+
+/* Symbols exported by the linker script(s). */
+extern unsigned _etext, _data, _edata, _ebss, _stack;
+
+void main(void);
+void reset_handler(void);
+void blocking_handler(void);
+void null_handler(void);
+
+void WEAK nmi_handler(void);
+void WEAK hard_fault_handler(void);
+void WEAK mem_manage_handler(void);
+void WEAK bus_fault_handler(void);
+void WEAK usage_fault_handler(void);
+void WEAK sv_call_handler(void);
+void WEAK debug_monitor_handler(void);
+void WEAK pend_sv_handler(void);
+void WEAK sys_tick_handler(void);
+
+/* TODO: Interrupt handler prototypes */
+
+__attribute__ ((section(".vectors")))
+void (*const vector_table[]) (void) = {
+ (void*)&_stack, /* Addr: 0x0000_0000 */
+ reset_handler, /* Addr: 0x0000_0004 */
+ nmi_handler, /* Addr: 0x0000_0008 */
+ hard_fault_handler, /* Addr: 0x0000_000C */
+ mem_manage_handler, /* Addr: 0x0000_0010 */
+ bus_fault_handler, /* Addr: 0x0000_0014 */
+ usage_fault_handler, /* Addr: 0x0000_0018 */
+ 0, 0, 0, 0, /* Reserved Addr: 0x0000_001C - 0x0000_002B */
+ sv_call_handler, /* Addr: 0x0000_002C */
+ debug_monitor_handler, /* Addr: 0x0000_0030 */
+ 0, /* Reserved Addr: 0x0000_00034 */
+ pend_sv_handler, /* Addr: 0x0000_0038 */
+ sys_tick_handler, /* Addr: 0x0000_003C */
+};
+
+
+void reset_handler(void)
+{
+ volatile unsigned *src, *dest;
+ __asm__("MSR msp, %0" : : "r"(&_stack));
+
+ for (src = &_etext, dest = &_data; dest < &_edata; src++, dest++)
+ *dest = *src;
+
+ while (dest < &_ebss)
+ *dest++ = 0;
+
+ /* Call the application's entry point. */
+ main();
+}
+
+void blocking_handler(void)
+{
+ while (1) ;
+}
+
+void null_handler(void)
+{
+ /* Do nothing. */
+}
+
+#pragma weak nmi_handler = null_handler
+#pragma weak hard_fault_handler = blocking_handler
+#pragma weak mem_manage_handler = blocking_handler
+#pragma weak bus_fault_handler = blocking_handler
+#pragma weak usage_fault_handler = blocking_handler
+#pragma weak sv_call_handler = null_handler
+#pragma weak debug_monitor_handler = null_handler
+#pragma weak pend_sv_handler = null_handler
+#pragma weak sys_tick_handler = null_handler
+/* TODO: Interrupt handler weak aliases */
diff --git a/lib/stm32/f1/Makefile b/lib/stm32/f1/Makefile
index 5025dfa..d598f84 100644
--- a/lib/stm32/f1/Makefile
+++ b/lib/stm32/f1/Makefile
@@ -3,18 +3,18 @@
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
-## This program is free software: you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
-## This program is distributed in the hope that it will be useful,
+## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
+## GNU Lesser General Public License for more details.
##
-## You should have received a copy of the GNU General Public License
-## along with this program. If not, see <http://www.gnu.org/licenses/>.
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_stm32f1
diff --git a/lib/stm32/f1/adc.c b/lib/stm32/f1/adc.c
index 7df1835..f07164f 100644
--- a/lib/stm32/f1/adc.c
+++ b/lib/stm32/f1/adc.c
@@ -193,13 +193,13 @@ void adc_start_conversion_injected(u32 adc)
while (ADC_CR2(adc) & ADC_CR2_JSWSTART);
}
-void adc_enable_external_trigger_regular(u32 adc, u8 trigger)
+void adc_enable_external_trigger_regular(u32 adc, u32 trigger)
{
u32 reg32;
- reg32 = (ADC_CR2(adc) & 0xfff1ffff); /* Clear bits [19:17]. */
+ reg32 = (ADC_CR2(adc) & ~(ADC_CR2_EXTSEL_MASK));
if (trigger < 8)
- reg32 |= (trigger << ADC_CR2_EXTSEL_LSB);
+ reg32 |= (trigger);
ADC_CR2(adc) = reg32;
ADC_CR2(adc) |= ADC_CR2_EXTTRIG;
}
@@ -209,13 +209,13 @@ void adc_disable_external_trigger_regular(u32 adc)
ADC_CR2(adc) &= ~ADC_CR2_EXTTRIG;
}
-void adc_enable_external_trigger_injected(u32 adc, u8 trigger)
+void adc_enable_external_trigger_injected(u32 adc, u32 trigger)
{
u32 reg32;
- reg32 = (ADC_CR2(adc) & 0xffff8fff); /* Clear bits [12:14]. */
+ reg32 = (ADC_CR2(adc) & ~(ADC_CR2_JEXTSEL_MASK)); /* Clear bits [12:14]. */
if (trigger < 8)
- reg32 |= (trigger << ADC_CR2_JEXTSEL_LSB);
+ reg32 |= (trigger);
ADC_CR2(adc) = reg32;
ADC_CR2(adc) |= ADC_CR2_JEXTTRIG;
}
diff --git a/lib/stm32/f1/can.c b/lib/stm32/f1/can.c
index 151c47c..fc7e0e7 100644
--- a/lib/stm32/f1/can.c
+++ b/lib/stm32/f1/can.c
@@ -228,7 +228,7 @@ int can_transmit(u32 canport, u32 id, bool ext, bool rtr, u8 length, u8 *data)
CAN_TIxR(canport, mailbox) |= CAN_TIxR_RTR; /* Set */
/* Set the DLC. */
- CAN_TDTxR(canport, mailbox) &= 0xFFFFFFFF0;
+ CAN_TDTxR(canport, mailbox) &= 0xFFFFFFF0;
CAN_TDTxR(canport, mailbox) |= length & CAN_TDTxR_DLC_MASK;
/* Set the data. */
diff --git a/lib/stm32/f1/libopencm3_stm32f1.ld b/lib/stm32/f1/libopencm3_stm32f1.ld
index 1dbc62a..0624b96 100644
--- a/lib/stm32/f1/libopencm3_stm32f1.ld
+++ b/lib/stm32/f1/libopencm3_stm32f1.ld
@@ -38,36 +38,36 @@ SECTIONS
. = ALIGN(4);
*(.rodata*) /* Read-only data */
. = ALIGN(4);
- _etext = .;
} >rom
- . = ORIGIN(ram);
+ /* exception index - required due to libgcc.a issuing /0 exceptions */
+ __exidx_start = .;
+ .ARM.exidx : {
+ *(.ARM.exidx*)
+ } > rom
+ __exidx_end = .;
- .data : AT(_etext) {
+
+ _etext = .;
+
+ .data : {
_data = .;
*(.data*) /* Read-write initialized data */
. = ALIGN(4);
_edata = .;
- } >ram
+ } >ram AT >rom
.bss : {
*(.bss*) /* Read-write zero initialized data */
*(COMMON)
. = ALIGN(4);
_ebss = .;
- } >ram AT >rom
-
- /*
- * The .eh_frame section appears to be used for C++ exception handling.
- * You may need to fix this if you're using C++.
- */
- /DISCARD/ : { *(.eh_frame) }
+ } >ram
- /*
- * Another section used by C++ stuff, appears when using newlib with
- * 64bit (long long) printf support - discard it for now.
- */
- /DISCARD/ : { *(.ARM.exidx) }
+ /* exception unwind data - required due to libgcc.a issuing /0 exceptions */
+ .ARM.extab : {
+ *(.ARM.extab*)
+ } >ram
. = ALIGN(4);
end = .;
diff --git a/lib/stm32/f2/Makefile b/lib/stm32/f2/Makefile
index 17c8ad0..e0f8d95 100644
--- a/lib/stm32/f2/Makefile
+++ b/lib/stm32/f2/Makefile
@@ -3,18 +3,18 @@
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
-## This program is free software: you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
-## This program is distributed in the hope that it will be useful,
+## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
+## GNU Lesser General Public License for more details.
##
-## You should have received a copy of the GNU General Public License
-## along with this program. If not, see <http://www.gnu.org/licenses/>.
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_stm32f2
diff --git a/lib/stm32/f2/libopencm3_stm32f2.ld b/lib/stm32/f2/libopencm3_stm32f2.ld
index 1dbc62a..0624b96 100644
--- a/lib/stm32/f2/libopencm3_stm32f2.ld
+++ b/lib/stm32/f2/libopencm3_stm32f2.ld
@@ -38,36 +38,36 @@ SECTIONS
. = ALIGN(4);
*(.rodata*) /* Read-only data */
. = ALIGN(4);
- _etext = .;
} >rom
- . = ORIGIN(ram);
+ /* exception index - required due to libgcc.a issuing /0 exceptions */
+ __exidx_start = .;
+ .ARM.exidx : {
+ *(.ARM.exidx*)
+ } > rom
+ __exidx_end = .;
- .data : AT(_etext) {
+
+ _etext = .;
+
+ .data : {
_data = .;
*(.data*) /* Read-write initialized data */
. = ALIGN(4);
_edata = .;
- } >ram
+ } >ram AT >rom
.bss : {
*(.bss*) /* Read-write zero initialized data */
*(COMMON)
. = ALIGN(4);
_ebss = .;
- } >ram AT >rom
-
- /*
- * The .eh_frame section appears to be used for C++ exception handling.
- * You may need to fix this if you're using C++.
- */
- /DISCARD/ : { *(.eh_frame) }
+ } >ram
- /*
- * Another section used by C++ stuff, appears when using newlib with
- * 64bit (long long) printf support - discard it for now.
- */
- /DISCARD/ : { *(.ARM.exidx) }
+ /* exception unwind data - required due to libgcc.a issuing /0 exceptions */
+ .ARM.extab : {
+ *(.ARM.extab*)
+ } >ram
. = ALIGN(4);
end = .;
diff --git a/lib/stm32/f4/Makefile b/lib/stm32/f4/Makefile
index b27ef8e..f8b4dd2 100644
--- a/lib/stm32/f4/Makefile
+++ b/lib/stm32/f4/Makefile
@@ -3,18 +3,18 @@
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
-## This program is free software: you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
-## This program is distributed in the hope that it will be useful,
+## This library is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
+## GNU Lesser General Public License for more details.
##
-## You should have received a copy of the GNU General Public License
-## along with this program. If not, see <http://www.gnu.org/licenses/>.
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
##
LIBNAME = libopencm3_stm32f4
diff --git a/lib/stm32/f4/libopencm3_stm32f4.ld b/lib/stm32/f4/libopencm3_stm32f4.ld
index 1dbc62a..0624b96 100644
--- a/lib/stm32/f4/libopencm3_stm32f4.ld
+++ b/lib/stm32/f4/libopencm3_stm32f4.ld
@@ -38,36 +38,36 @@ SECTIONS
. = ALIGN(4);
*(.rodata*) /* Read-only data */
. = ALIGN(4);
- _etext = .;
} >rom
- . = ORIGIN(ram);
+ /* exception index - required due to libgcc.a issuing /0 exceptions */
+ __exidx_start = .;
+ .ARM.exidx : {
+ *(.ARM.exidx*)
+ } > rom
+ __exidx_end = .;
- .data : AT(_etext) {
+
+ _etext = .;
+
+ .data : {
_data = .;
*(.data*) /* Read-write initialized data */
. = ALIGN(4);
_edata = .;
- } >ram
+ } >ram AT >rom
.bss : {
*(.bss*) /* Read-write zero initialized data */
*(COMMON)
. = ALIGN(4);
_ebss = .;
- } >ram AT >rom
-
- /*
- * The .eh_frame section appears to be used for C++ exception handling.
- * You may need to fix this if you're using C++.
- */
- /DISCARD/ : { *(.eh_frame) }
+ } >ram
- /*
- * Another section used by C++ stuff, appears when using newlib with
- * 64bit (long long) printf support - discard it for now.
- */
- /DISCARD/ : { *(.ARM.exidx) }
+ /* exception unwind data - required due to libgcc.a issuing /0 exceptions */
+ .ARM.extab : {
+ *(.ARM.extab*)
+ } >ram
. = ALIGN(4);
end = .;
diff --git a/lib/stm32/spi.c b/lib/stm32/spi.c
index af093ad..828e123 100644
--- a/lib/stm32/spi.c
+++ b/lib/stm32/spi.c
@@ -61,7 +61,10 @@ void spi_reset(u32 spi_peripheral)
int spi_init_master(u32 spi, u32 br, u32 cpol, u32 cpha, u32 dff, u32 lsbfirst)
{
- u32 reg32 = 0;
+ u32 reg32 = SPI_CR1(spi);
+
+ /* Reset all bits omitting SPE, CRCEN and CRCNEXT bits. */
+ reg32 &= SPI_CR1_SPE | SPI_CR1_CRCEN | SPI_CR1_CRCNEXT;
reg32 |= SPI_CR1_MSTR; /* Configure SPI as master. */