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authorMichael Ossmann2012-06-25 17:06:31 -0700
committerMichael Ossmann2012-06-25 17:06:31 -0700
commit7ef51e30e9a406789aca7b989e2c45e5a27e6e97 (patch)
treefc78b6fcdd55e540c3aa9446fb816282343b8d7f
parent94455ed1916ce378e97971201793397dcee5a924 (diff)
parent81317c02ab3c33e820fe4852c053476a33c6f834 (diff)
Merge pull request #9 from TitanMKD/master
Fixed Linker ROM to RAM
-rw-r--r--examples/lpc43xx/hackrf-jellybean/jellybean-lpc4330_rom_to_ram.ld3
-rw-r--r--include/libopencm3/lpc43xx/gpio.h1
-rw-r--r--lib/lpc43xx/Makefile2
-rw-r--r--lib/lpc43xx/gpio.c7
-rw-r--r--lib/lpc43xx/libopencm3_lpc43xx_rom_to_ram.ld16
-rw-r--r--lib/lpc43xx/vector.c3
6 files changed, 21 insertions, 11 deletions
diff --git a/examples/lpc43xx/hackrf-jellybean/jellybean-lpc4330_rom_to_ram.ld b/examples/lpc43xx/hackrf-jellybean/jellybean-lpc4330_rom_to_ram.ld
index 385b081..fb3d8f6 100644
--- a/examples/lpc43xx/hackrf-jellybean/jellybean-lpc4330_rom_to_ram.ld
+++ b/examples/lpc43xx/hackrf-jellybean/jellybean-lpc4330_rom_to_ram.ld
@@ -28,7 +28,8 @@ MEMORY
/* rom is really the shadow region that points to SPI flash or elsewhere */
rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M
ram (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
- /* there are some additional RAM regions */
+ /* there are some additional RAM regions for data */
+ ram_data (rw) : ORIGIN = 0x10080000, LENGTH = 72K
}
/* Include the common ld script. */
diff --git a/include/libopencm3/lpc43xx/gpio.h b/include/libopencm3/lpc43xx/gpio.h
index 6052887..8abd546 100644
--- a/include/libopencm3/lpc43xx/gpio.h
+++ b/include/libopencm3/lpc43xx/gpio.h
@@ -155,5 +155,6 @@
void gpio_set(u32 gpioport, u32 gpios);
void gpio_clear(u32 gpioport, u32 gpios);
+void gpio_toggle(u32 gpioport, u32 gpios);
#endif
diff --git a/lib/lpc43xx/Makefile b/lib/lpc43xx/Makefile
index e8bd8fc..91169d4 100644
--- a/lib/lpc43xx/Makefile
+++ b/lib/lpc43xx/Makefile
@@ -25,7 +25,7 @@ PREFIX ?= arm-none-eabi
#PREFIX ?= arm-elf
CC = $(PREFIX)-gcc
AR = $(PREFIX)-ar
-CFLAGS = -O2 -g -Wall -Wextra -I../../include -fno-common \
+CFLAGS = -O2 -g3 -Wall -Wextra -I../../include -fno-common \
-mcpu=cortex-m4 -mthumb -Wstrict-prototypes \
-ffunction-sections -fdata-sections -MD \
-mfloat-abi=hard -mfpu=fpv4-sp-d16
diff --git a/lib/lpc43xx/gpio.c b/lib/lpc43xx/gpio.c
index 9134f70..1256fd0 100644
--- a/lib/lpc43xx/gpio.c
+++ b/lib/lpc43xx/gpio.c
@@ -26,5 +26,10 @@ void gpio_set(u32 gpioport, u32 gpios)
void gpio_clear(u32 gpioport, u32 gpios)
{
- GPIO_CLR(gpioport) = gpios;
+ GPIO_CLR(gpioport) = gpios;
}
+
+void gpio_toggle(u32 gpioport, u32 gpios)
+{
+ GPIO_NOT(gpioport) = gpios;
+} \ No newline at end of file
diff --git a/lib/lpc43xx/libopencm3_lpc43xx_rom_to_ram.ld b/lib/lpc43xx/libopencm3_lpc43xx_rom_to_ram.ld
index f833aaf..0270ea8 100644
--- a/lib/lpc43xx/libopencm3_lpc43xx_rom_to_ram.ld
+++ b/lib/lpc43xx/libopencm3_lpc43xx_rom_to_ram.ld
@@ -36,7 +36,7 @@ SECTIONS
.text : {
. = ALIGN(0x400);
- _text_ram = . + ORIGIN(ram); /* Start of Code in RAM */
+ _text_ram = (. - ORIGIN(rom)) + ORIGIN(ram); /* Start of Code in RAM */
*(.vectors) /* Vector table */
*(.text*) /* Program code */
@@ -53,29 +53,29 @@ SECTIONS
__exidx_end = .;
_etext = .;
- _etext_ram = . + ORIGIN(ram);
- _etext_rom = . + ORIGIN(rom_flash);
-
- . = ORIGIN(ram);
+ _etext_ram = (. - ORIGIN(rom)) + ORIGIN(ram);
+ _etext_rom = (. - ORIGIN(rom)) + ORIGIN(rom_flash);
.data : {
_data = .;
*(.data*) /* Read-write initialized data */
. = ALIGN(4);
_edata = .;
- } >ram AT >rom
+ } >ram_data AT >rom
.bss : {
+ . = _edata;
*(.bss*) /* Read-write zero initialized data */
*(COMMON)
. = ALIGN(4);
_ebss = .;
- } >ram
+ } >ram_data
/* exception unwind data - required due to libgcc.a issuing /0 exceptions */
.ARM.extab : {
+ . = _ebss;
*(.ARM.extab*)
- } >ram
+ } >ram_data
/*
* The .eh_frame section appears to be used for C++ exception handling.
diff --git a/lib/lpc43xx/vector.c b/lib/lpc43xx/vector.c
index 631e54e..daef5a9 100644
--- a/lib/lpc43xx/vector.c
+++ b/lib/lpc43xx/vector.c
@@ -171,6 +171,9 @@ void reset_handler(void)
if( (&_etext_ram-&_text_ram) > 0 )
{
src = &_etext_rom-(&_etext_ram-&_text_ram);
+ /* Change Shadow memory to ROM (for Debug Purpose in case Boot has not set correctly the M4MEMMAP because of debug) */
+ CREG_M4MEMMAP = (unsigned long)src;
+
for(dest = &_text_ram; dest < &_etext_ram; )
{
*dest++ = *src++;