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authorMichael Ossmann2012-06-06 22:05:03 -0600
committerMichael Ossmann2012-06-06 22:05:03 -0600
commit251687fe37af0c2869c46f27e52d35c2a4679fcf (patch)
tree76d70e1234e89ffbcaefbebb298d48949b8c5b61
parentbef51163ce72b417bf51a76590857886689cbeef (diff)
changed I2C to run directly from IRC
-rw-r--r--lib/lpc43xx/i2c.c19
1 files changed, 9 insertions, 10 deletions
diff --git a/lib/lpc43xx/i2c.c b/lib/lpc43xx/i2c.c
index 9d742e0..f006615 100644
--- a/lib/lpc43xx/i2c.c
+++ b/lib/lpc43xx/i2c.c
@@ -31,21 +31,20 @@ void i2c0_init(void)
/* enable input on SCL and SDA pins */
SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
- /* use PLL1 as clock source for APB1 (including I2C0) */
- CGU_BASE_APB1_CLK = (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT);
+ /* use IRC as clock source for APB1 (including I2C0) */
+ CGU_BASE_APB1_CLK = (CGU_SRC_IRC << CGU_BASE_CLK_SEL_SHIFT);
- /* FIXME assuming we're on IRC at 96 MHz */
+ /* FIXME assuming we're on IRC at 12 MHz */
/* 400 kHz I2C */
- /*
- I2C0_SCLH = 120;
- I2C0_SCLL = 120;
- */
+ I2C0_SCLH = 15;
+ I2C0_SCLL = 15;
/* 100 kHz I2C */
- I2C0_SCLH = 480;
- I2C0_SCLL = 480;
- /* FIXME not sure why this appears to run at about 290 kHz */
+ /*
+ I2C0_SCLH = 60;
+ I2C0_SCLL = 60;
+ */
/* clear the control bits */
I2C0_CONCLR = (I2C_CONCLR_AAC | I2C_CONCLR_SIC