From cd5d569d38ea8cc905739bd9189ac5f944de0207 Mon Sep 17 00:00:00 2001 From: Gareth McMullin Date: Sat, 4 Apr 2015 12:44:30 -0700 Subject: lpc: Reduce differences between lpc11xx and lpc43xx code. --- src/lpc43xx.c | 144 +++++++++++++++------------------------------------------- 1 file changed, 37 insertions(+), 107 deletions(-) (limited to 'src/lpc43xx.c') diff --git a/src/lpc43xx.c b/src/lpc43xx.c index 1519306..ad93c8d 100644 --- a/src/lpc43xx.c +++ b/src/lpc43xx.c @@ -1,7 +1,8 @@ /* * This file is part of the Black Magic Debug project. * - * Copyright (C) 2012 Gareth McMullin + * Copyright (C) 2014 Allen Ibara + * Copyright (C) 2015 Gareth McMullin * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -19,17 +20,13 @@ #include "general.h" #include "command.h" -#include "adiv5.h" #include "target.h" #include "gdb_packet.h" +#include "cortexm.h" +#include "lpc_common.h" #define LPC43XX_CHIPID 0x40043200 #define ARM_CPUID 0xE000ED00 -#define ARM_THUMB_BREAKPOINT 0xBE00 - -#define R_MSP 17 // Main stack pointer register number -#define R_PC 15 // Program counter register number -#define R_LR 14 // Link register number #define IAP_ENTRYPOINT_LOCATION 0x10400100 @@ -47,25 +44,6 @@ #define IAP_PGM_CHUNKSIZE 4096 -#define IAP_CMD_INIT 49 -#define IAP_CMD_PREPARE 50 -#define IAP_CMD_PROGRAM 51 -#define IAP_CMD_ERASE 52 -#define IAP_CMD_BLANKCHECK 53 -#define IAP_CMD_SET_ACTIVE_BANK 60 - -#define IAP_STATUS_CMD_SUCCESS 0 -#define IAP_STATUS_INVALID_COMMAND 1 -#define IAP_STATUS_SRC_ADDR_ERROR 2 -#define IAP_STATUS_DST_ADDR_ERROR 3 -#define IAP_STATUS_SRC_ADDR_NOT_MAPPED 4 -#define IAP_STATUS_DST_ADDR_NOT_MAPPED 5 -#define IAP_STATUS_COUNT_ERROR 6 -#define IAP_STATUS_INVALID_SECTOR 7 -#define IAP_STATUS_SECTOR_NOT_BLANK 8 -#define IAP_STATUS_SECTOR_NOT_PREPARED 9 -#define IAP_STATUS_COMPARE_ERROR 10 -#define IAP_STATUS_BUSY 11 #define FLASH_BANK_A_BASE 0x1A000000 #define FLASH_BANK_A_SIZE 0x80000 @@ -75,45 +53,6 @@ #define FLASH_NUM_SECTOR 15 #define FLASH_LARGE_SECTOR_OFFSET 0x00010000 -/* CPU Frequency */ -#define CPU_CLK_KHZ 12000 - -struct flash_param { - uint16_t opcode; /* opcode to return to after calling the ROM */ - uint16_t pad0; - uint32_t command; /* IAP command */ - union { - uint32_t words[5]; /* command parameters */ - struct { - uint32_t start_sector; - uint32_t end_sector; - uint32_t flash_bank; - } prepare; - struct { - uint32_t start_sector; - uint32_t end_sector; - uint32_t cpu_clk_khz; - uint32_t flash_bank; - } erase; - struct { - uint32_t dest; - uint32_t source; - uint32_t byte_count; - uint32_t cpu_clk_khz; - } program; - struct { - uint32_t start_sector; - uint32_t end_sector; - uint32_t flash_bank; - } blank_check; - struct { - uint32_t flash_bank; - uint32_t cpu_clk_khz; - } make_active; - } params; - uint32_t result[5]; /* result data */ -} __attribute__((aligned(4))); - struct flash_program { struct flash_param p; uint8_t data[IAP_PGM_CHUNKSIZE]; @@ -242,9 +181,9 @@ static bool lpc43xx_cmd_erase(target *t, int argc, const char *argv[]) for (bank = 0; bank < FLASH_NUM_BANK; bank++) { flash_pgm.p.command = IAP_CMD_PREPARE; - flash_pgm.p.params.prepare.start_sector = 0; - flash_pgm.p.params.prepare.end_sector = FLASH_NUM_SECTOR-1; - flash_pgm.p.params.prepare.flash_bank = bank; + flash_pgm.p.prepare.start_sector = 0; + flash_pgm.p.prepare.end_sector = FLASH_NUM_SECTOR-1; + flash_pgm.p.prepare.flash_bank = bank; flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { @@ -252,10 +191,10 @@ static bool lpc43xx_cmd_erase(target *t, int argc, const char *argv[]) } flash_pgm.p.command = IAP_CMD_ERASE; - flash_pgm.p.params.erase.start_sector = 0; - flash_pgm.p.params.prepare.end_sector = FLASH_NUM_SECTOR-1; - flash_pgm.p.params.erase.cpu_clk_khz = CPU_CLK_KHZ; - flash_pgm.p.params.erase.flash_bank = bank; + flash_pgm.p.erase.start_sector = 0; + flash_pgm.p.prepare.end_sector = FLASH_NUM_SECTOR-1; + flash_pgm.p.erase.cpu_clk_khz = CPU_CLK_KHZ; + flash_pgm.p.erase.flash_bank = bank; flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) @@ -343,8 +282,8 @@ static void lpc43xx_iap_call(target *t, struct flash_param *param, unsigned para target_mem_read(t, &iap_entry, IAP_ENTRYPOINT_LOCATION, sizeof(iap_entry)); /* fill out the remainder of the parameters and copy the structure to RAM */ - param->opcode = ARM_THUMB_BREAKPOINT; /* breakpoint */ - param->pad0 = 0x0000; /* pad */ + param->opcode = ARM_THUMB_BREAKPOINT; + param->pad0 = 0x0000; target_mem_write(t, IAP_RAM_BASE, param, param_len); /* set up for the call to the IAP ROM */ @@ -352,9 +291,9 @@ static void lpc43xx_iap_call(target *t, struct flash_param *param, unsigned para regs[0] = IAP_RAM_BASE + offsetof(struct flash_param, command); regs[1] = IAP_RAM_BASE + offsetof(struct flash_param, result); - regs[R_MSP] = IAP_RAM_BASE + IAP_RAM_SIZE; - regs[R_LR] = IAP_RAM_BASE | 1; - regs[R_PC] = iap_entry; + regs[REG_MSP] = IAP_RAM_BASE + IAP_RAM_SIZE; + regs[REG_LR] = IAP_RAM_BASE | 1; + regs[REG_PC] = iap_entry; target_regs_write(t, regs); /* start the target and wait for it to halt again */ @@ -370,11 +309,11 @@ static int lpc43xx_flash_prepare(target *t, uint32_t addr, int len) struct flash_program flash_pgm; /* prepare the sector(s) to be erased */ + memset(&flash_pgm.p, 0, sizeof(flash_pgm.p)); flash_pgm.p.command = IAP_CMD_PREPARE; - flash_pgm.p.params.prepare.start_sector = sector_number(addr); - flash_pgm.p.params.prepare.end_sector = sector_number(addr+len); - flash_pgm.p.params.prepare.flash_bank = flash_bank(addr); - flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; + flash_pgm.p.prepare.start_sector = sector_number(addr); + flash_pgm.p.prepare.end_sector = sector_number(addr+len); + flash_pgm.p.prepare.flash_bank = flash_bank(addr); lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { @@ -402,10 +341,10 @@ static int lpc43xx_flash_erase(target *t, uint32_t addr, size_t len) /* and now erase them */ flash_pgm.p.command = IAP_CMD_ERASE; - flash_pgm.p.params.erase.start_sector = sector_number(addr); - flash_pgm.p.params.erase.end_sector = sector_number(addr+len); - flash_pgm.p.params.erase.cpu_clk_khz = CPU_CLK_KHZ; - flash_pgm.p.params.erase.flash_bank = flash_bank(addr); + flash_pgm.p.erase.start_sector = sector_number(addr); + flash_pgm.p.erase.end_sector = sector_number(addr+len); + flash_pgm.p.erase.cpu_clk_khz = CPU_CLK_KHZ; + flash_pgm.p.erase.flash_bank = flash_bank(addr); flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { @@ -414,9 +353,9 @@ static int lpc43xx_flash_erase(target *t, uint32_t addr, size_t len) /* check erase ok */ flash_pgm.p.command = IAP_CMD_BLANKCHECK; - flash_pgm.p.params.blank_check.start_sector = sector_number(addr); - flash_pgm.p.params.blank_check.end_sector = sector_number(addr+len); - flash_pgm.p.params.blank_check.flash_bank = flash_bank(addr); + flash_pgm.p.blank_check.start_sector = sector_number(addr); + flash_pgm.p.blank_check.end_sector = sector_number(addr+len); + flash_pgm.p.blank_check.flash_bank = flash_bank(addr); flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { @@ -437,17 +376,13 @@ static int lpc43xx_flash_write(target *t, { unsigned first_chunk = dest / IAP_PGM_CHUNKSIZE; unsigned last_chunk = (dest + len - 1) / IAP_PGM_CHUNKSIZE; - unsigned chunk_offset; + unsigned chunk_offset = dest % IAP_PGM_CHUNKSIZE; unsigned chunk; struct flash_program flash_pgm; for (chunk = first_chunk; chunk <= last_chunk; chunk++) { - if (chunk == first_chunk) { - chunk_offset = dest % IAP_PGM_CHUNKSIZE; - } else { - chunk_offset = 0; - } + DEBUG("chunk %u len %zu\n", chunk, len); /* first and last chunk may require special handling */ if ((chunk == first_chunk) || (chunk == last_chunk)) { @@ -464,6 +399,7 @@ static int lpc43xx_flash_write(target *t, /* update to suit */ len -= copylen; src += copylen; + chunk_offset = 0; } else { /* interior chunk, must be aligned and full-sized */ memcpy(flash_pgm.data, src, IAP_PGM_CHUNKSIZE); @@ -472,21 +408,15 @@ static int lpc43xx_flash_write(target *t, } /* prepare... */ - if (lpc43xx_flash_prepare(t, chunk * IAP_PGM_CHUNKSIZE, IAP_PGM_CHUNKSIZE)) { + if (lpc43xx_flash_prepare(t, chunk * IAP_PGM_CHUNKSIZE, IAP_PGM_CHUNKSIZE)) return -1; - } - - /* copy buffer into target memory */ - target_mem_write(t, - IAP_RAM_BASE + offsetof(struct flash_program, data), - flash_pgm.data, sizeof(flash_pgm.data)); /* set the destination address and program */ flash_pgm.p.command = IAP_CMD_PROGRAM; - flash_pgm.p.params.program.dest = chunk * IAP_PGM_CHUNKSIZE; - flash_pgm.p.params.program.source = IAP_RAM_BASE + offsetof(struct flash_program, data); - flash_pgm.p.params.program.byte_count = IAP_PGM_CHUNKSIZE; - flash_pgm.p.params.program.cpu_clk_khz = CPU_CLK_KHZ; + flash_pgm.p.program.dest = chunk * IAP_PGM_CHUNKSIZE; + flash_pgm.p.program.source = IAP_RAM_BASE + offsetof(struct flash_program, data); + flash_pgm.p.program.byte_count = IAP_PGM_CHUNKSIZE; + flash_pgm.p.program.cpu_clk_khz = CPU_CLK_KHZ; flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm)); if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { @@ -524,8 +454,8 @@ static bool lpc43xx_cmd_mkboot(target *t, int argc, const char *argv[]) /* special command to compute/write magic vector for signature */ flash_pgm.p.command = IAP_CMD_SET_ACTIVE_BANK; - flash_pgm.p.params.make_active.flash_bank = bank; - flash_pgm.p.params.make_active.cpu_clk_khz = CPU_CLK_KHZ; + flash_pgm.p.make_active.flash_bank = bank; + flash_pgm.p.make_active.cpu_clk_khz = CPU_CLK_KHZ; flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm)); if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { -- cgit v1.2.3 From 3d8b34f180eaa9bfe021186b9e20a8a551b35515 Mon Sep 17 00:00:00 2001 From: Gareth McMullin Date: Sat, 4 Apr 2015 19:15:03 -0700 Subject: lpc: split out common code and rewrite to use new interface. --- src/Makefile | 1 + src/include/lpc_common.h | 91 ++++++------- src/lpc11xx.c | 248 +++++----------------------------- src/lpc43xx.c | 337 +++++++---------------------------------------- src/lpc_common.c | 135 +++++++++++++++++++ 5 files changed, 256 insertions(+), 556 deletions(-) create mode 100644 src/lpc_common.c (limited to 'src/lpc43xx.c') diff --git a/src/Makefile b/src/Makefile index 3d879ef..856baee 100644 --- a/src/Makefile +++ b/src/Makefile @@ -28,6 +28,7 @@ SRC = \ jtag_scan.c \ jtagtap.c \ lmi.c \ + lpc_common.c \ lpc11xx.c \ lpc43xx.c \ kinetis.c \ diff --git a/src/include/lpc_common.h b/src/include/lpc_common.h index 45d2964..4886156 100644 --- a/src/include/lpc_common.h +++ b/src/include/lpc_common.h @@ -20,64 +20,49 @@ #ifndef __LPC_COMMON_H #define __LPC_COMMON_H -#define IAP_CMD_INIT 49 -#define IAP_CMD_PREPARE 50 -#define IAP_CMD_PROGRAM 51 -#define IAP_CMD_ERASE 52 -#define IAP_CMD_BLANKCHECK 53 -#define IAP_CMD_SET_ACTIVE_BANK 60 +enum iap_cmd { + IAP_CMD_INIT = 49, + IAP_CMD_PREPARE = 50, + IAP_CMD_PROGRAM = 51, + IAP_CMD_ERASE = 52, + IAP_CMD_BLANKCHECK = 53, + IAP_CMD_SET_ACTIVE_BANK = 60, +}; -#define IAP_STATUS_CMD_SUCCESS 0 -#define IAP_STATUS_INVALID_COMMAND 1 -#define IAP_STATUS_SRC_ADDR_ERROR 2 -#define IAP_STATUS_DST_ADDR_ERROR 3 -#define IAP_STATUS_SRC_ADDR_NOT_MAPPED 4 -#define IAP_STATUS_DST_ADDR_NOT_MAPPED 5 -#define IAP_STATUS_COUNT_ERROR 6 -#define IAP_STATUS_INVALID_SECTOR 7 -#define IAP_STATUS_SECTOR_NOT_BLANK 8 -#define IAP_STATUS_SECTOR_NOT_PREPARED 9 -#define IAP_STATUS_COMPARE_ERROR 10 -#define IAP_STATUS_BUSY 11 +enum iap_status { + IAP_STATUS_CMD_SUCCESS = 0, + IAP_STATUS_INVALID_COMMAND = 1, + IAP_STATUS_SRC_ADDR_ERROR = 2, + IAP_STATUS_DST_ADDR_ERROR = 3, + IAP_STATUS_SRC_ADDR_NOT_MAPPED = 4, + IAP_STATUS_DST_ADDR_NOT_MAPPED = 5, + IAP_STATUS_COUNT_ERROR = 6, + IAP_STATUS_INVALID_SECTOR = 7, + IAP_STATUS_SECTOR_NOT_BLANK = 8, + IAP_STATUS_SECTOR_NOT_PREPARED = 9, + IAP_STATUS_COMPARE_ERROR = 10, + IAP_STATUS_BUSY = 11, +}; /* CPU Frequency */ #define CPU_CLK_KHZ 12000 -struct flash_param { - uint16_t opcode;/* opcode to return to after calling the ROM */ - uint16_t pad0; - uint32_t command;/* IAP command */ - union { - uint32_t words[5];/* command parameters */ - struct { - uint32_t start_sector; - uint32_t end_sector; - uint32_t flash_bank; - } prepare; - struct { - uint32_t start_sector; - uint32_t end_sector; - uint32_t cpu_clk_khz; - uint32_t flash_bank; - } erase; - struct { - uint32_t dest; - uint32_t source; - uint32_t byte_count; - uint32_t cpu_clk_khz; - } program; - struct { - uint32_t start_sector; - uint32_t end_sector; - uint32_t flash_bank; - } blank_check; - struct { - uint32_t flash_bank; - uint32_t cpu_clk_khz; - } make_active; - }; - uint32_t result[5]; /* result data */ -} __attribute__((aligned(4))); +struct lpc_flash { + struct target_flash f; + uint8_t base_sector; + uint8_t bank; + /* Info filled in by specific driver */ + void (*wdt_kick)(target *t); + uint32_t iap_entry; + uint32_t iap_ram; + uint32_t iap_msp; +}; + +struct lpc_flash *lpc_add_flash(target *t, uint32_t addr, size_t length); +enum iap_status lpc_iap_call(struct lpc_flash *f, enum iap_cmd cmd, ...); +int lpc_flash_erase(struct target_flash *f, uint32_t addr, size_t len); +int lpc_flash_write(struct target_flash *f, + uint32_t dest, const void *src, size_t len); #endif diff --git a/src/lpc11xx.c b/src/lpc11xx.c index 7c6d742..09a0622 100644 --- a/src/lpc11xx.c +++ b/src/lpc11xx.c @@ -23,63 +23,27 @@ #include "cortexm.h" #include "lpc_common.h" -#define IAP_PGM_CHUNKSIZE 256 /* should fit in RAM on any device */ +#define IAP_PGM_CHUNKSIZE 512 /* should fit in RAM on any device */ - -#define MIN_RAM_SIZE_FOR_LPC8xx 1024 -#define MIN_RAM_SIZE_FOR_LPC1xxx 2048 +#define MIN_RAM_SIZE 1024 #define RAM_USAGE_FOR_IAP_ROUTINES 32 /* IAP routines use 32 bytes at top of ram */ #define IAP_ENTRYPOINT 0x1fff1ff1 #define IAP_RAM_BASE 0x10000000 -static const char lpc8xx_driver[] = "lpc8xx"; -static const char lpc11xx_driver[] = "lpc11xx"; -static void lpc11x_iap_call(target *t, struct flash_param *param, unsigned param_len); -static int lpc11xx_flash_prepare(target *t, uint32_t addr, int len); -static int lpc11xx_flash_erase(target *t, uint32_t addr, size_t len); -static int lpc11xx_flash_write(target *t, uint32_t dest, const uint8_t *src, - size_t len); - -struct flash_program { - struct flash_param p; - uint8_t data[IAP_PGM_CHUNKSIZE]; -}; +static int lpc11xx_flash_write(struct target_flash *f, + uint32_t dest, const void *src, size_t len); -/* - * Note that this memory map is actually for the largest of the lpc11xx devices; - * There seems to be no good way to decode the part number to determine the RAM - * and flash sizes. - */ -static const char lpc11xx_xml_memory_map[] = "" -/* ""*/ - "" - " " - " 0x1000" - " " - " " - ""; - -/* - * Memory map for the lpc8xx devices, which otherwise look much like the lpc11xx. - * - * We could decode the RAM/flash sizes, but we just encode the largest possible here. - * - * Note that the LPC810 and LPC811 map their flash oddly; see the NXP LPC800 user - * manual (UM10601) for more details. - */ -static const char lpc8xx_xml_memory_map[] = "" -/* ""*/ - "" - " " - " 0x400" - " " - " " - ""; +void lpc11xx_add_flash(target *t, uint32_t addr, size_t len, size_t erasesize) +{ + struct lpc_flash *lf = lpc_add_flash(t, addr, len); + lf->f.blocksize = erasesize; + lf->f.buf_size = IAP_PGM_CHUNKSIZE; + lf->f.write_buf = lpc11xx_flash_write; + lf->iap_entry = IAP_ENTRYPOINT; + lf->iap_ram = IAP_RAM_BASE; + lf->iap_msp = IAP_RAM_BASE + MIN_RAM_SIZE - RAM_USAGE_FOR_IAP_ROUTINES; +} bool lpc11xx_probe(target *t) @@ -122,183 +86,33 @@ lpc11xx_probe(target *t) case 0x2972402B: /* lpc11u23/301 */ case 0x2988402B: /* lpc11u24x/301 */ case 0x2980002B: /* lpc11u24x/401 */ - t->driver = lpc11xx_driver; - t->xml_mem_map = lpc11xx_xml_memory_map; - t->flash_erase = lpc11xx_flash_erase; - t->flash_write = lpc11xx_flash_write; - + t->driver = "LPC11xx"; + target_add_ram(t, 0x10000000, 0x2000); + lpc11xx_add_flash(t, 0x00000000, 0x20000, 0x1000); return true; case 0x1812202b: /* LPC812M101FDH20 */ - t->driver = lpc8xx_driver; - t->xml_mem_map = lpc8xx_xml_memory_map; - t->flash_erase = lpc11xx_flash_erase; - t->flash_write = lpc11xx_flash_write; - + t->driver = "LPC8xx"; + target_add_ram(t, 0x10000000, 0x1000); + lpc11xx_add_flash(t, 0x00000000, 0x4000, 0x400); return true; } return false; } -static void -lpc11x_iap_call(target *t, struct flash_param *param, unsigned param_len) +static int lpc11xx_flash_write(struct target_flash *f, + uint32_t dest, const void *src, size_t len) { - uint32_t regs[t->regs_size / sizeof(uint32_t)]; - - /* fill out the remainder of the parameters and copy the structure to RAM */ - param->opcode = ARM_THUMB_BREAKPOINT; - param->pad0 = 0x0000; - target_mem_write(t, IAP_RAM_BASE, param, param_len); - - /* set up for the call to the IAP ROM */ - target_regs_read(t, regs); - regs[0] = IAP_RAM_BASE + offsetof(struct flash_param, command); - regs[1] = IAP_RAM_BASE + offsetof(struct flash_param, result); - - // stack pointer - top of the smallest ram less 32 for IAP usage - if (t->driver == lpc8xx_driver) - regs[REG_MSP] = IAP_RAM_BASE + MIN_RAM_SIZE_FOR_LPC8xx - RAM_USAGE_FOR_IAP_ROUTINES; - else - regs[REG_MSP] = IAP_RAM_BASE + MIN_RAM_SIZE_FOR_LPC1xxx - RAM_USAGE_FOR_IAP_ROUTINES; - regs[REG_LR] = IAP_RAM_BASE | 1; - regs[REG_PC] = IAP_ENTRYPOINT; - target_regs_write(t, regs); - - /* start the target and wait for it to halt again */ - target_halt_resume(t, 0); - while (!target_halt_wait(t)); - - /* copy back just the parameters structure */ - target_mem_read(t, param, IAP_RAM_BASE, sizeof(struct flash_param)); -} - -static int flash_page_size(target *t) -{ - if (t->driver == lpc8xx_driver) - return 1024; - else - return 4096; -} - -static int -lpc11xx_flash_prepare(target *t, uint32_t addr, int len) -{ - struct flash_program flash_pgm; - /* prepare the sector(s) to be erased */ - memset(&flash_pgm.p, 0, sizeof(flash_pgm.p)); - flash_pgm.p.command = IAP_CMD_PREPARE; - flash_pgm.p.prepare.start_sector = addr / flash_page_size(t); - flash_pgm.p.prepare.end_sector = (addr + len - 1) / flash_page_size(t); - - lpc11x_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { - return -1; + if (dest == 0) { + /* Fill in the magic vector to allow booting the flash */ + uint32_t *w = (uint32_t *)src; + uint32_t sum = 0; + + for (unsigned i = 0; i < 7; i++) + sum += w[i]; + w[7] = ~sum + 1; } - - return 0; + return lpc_flash_write(f, dest, src, len); } -static int -lpc11xx_flash_erase(target *t, uint32_t addr, size_t len) -{ - struct flash_program flash_pgm; - - if (addr % flash_page_size(t)) - return -1; - - /* prepare... */ - if (lpc11xx_flash_prepare(t, addr, len)) - return -1; - - /* and now erase them */ - flash_pgm.p.command = IAP_CMD_ERASE; - flash_pgm.p.erase.start_sector = addr / flash_page_size(t); - flash_pgm.p.erase.end_sector = (addr + len - 1) / flash_page_size(t); - flash_pgm.p.erase.cpu_clk_khz = CPU_CLK_KHZ; - flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; - lpc11x_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { - return -1; - } - - /* check erase ok */ - flash_pgm.p.command = IAP_CMD_BLANKCHECK; - lpc11x_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { - return -1; - } - - return 0; -} - -static int -lpc11xx_flash_write(target *t, uint32_t dest, const uint8_t *src, size_t len) -{ - unsigned first_chunk = dest / IAP_PGM_CHUNKSIZE; - unsigned last_chunk = (dest + len - 1) / IAP_PGM_CHUNKSIZE; - unsigned chunk_offset = dest % IAP_PGM_CHUNKSIZE; - unsigned chunk; - struct flash_program flash_pgm; - - for (chunk = first_chunk; chunk <= last_chunk; chunk++) { - - DEBUG("chunk %u len %zu\n", chunk, len); - /* first and last chunk may require special handling */ - if ((chunk == first_chunk) || (chunk == last_chunk)) { - - /* fill with all ff to avoid sector rewrite corrupting other writes */ - memset(flash_pgm.data, 0xff, sizeof(flash_pgm.data)); - - /* copy as much as fits */ - size_t copylen = IAP_PGM_CHUNKSIZE - chunk_offset; - if (copylen > len) - copylen = len; - - memcpy(flash_pgm.data + chunk_offset, src, copylen); - /* if we are programming the vectors, calculate the magic number */ - if ((chunk == 0) && (chunk_offset == 0)) { - if (copylen < 32) { - /* we have to be programming at least the first 8 vectors... */ - return -1; - } - - uint32_t *w = (uint32_t *)(&flash_pgm.data[0]); - uint32_t sum = 0; - - for (unsigned i = 0; i < 7; i++) - sum += w[i]; - w[7] = ~sum + 1; - } - - /* update to suit */ - len -= copylen; - src += copylen; - chunk_offset = 0; - } else { - /* interior chunk, must be aligned and full-sized */ - memcpy(flash_pgm.data, src, IAP_PGM_CHUNKSIZE); - len -= IAP_PGM_CHUNKSIZE; - src += IAP_PGM_CHUNKSIZE; - } - - /* prepare... */ - if (lpc11xx_flash_prepare(t, chunk * IAP_PGM_CHUNKSIZE, IAP_PGM_CHUNKSIZE)) - return -1; - - /* set the destination address and program */ - flash_pgm.p.command = IAP_CMD_PROGRAM; - flash_pgm.p.program.dest = chunk * IAP_PGM_CHUNKSIZE; - flash_pgm.p.program.source = IAP_RAM_BASE + offsetof(struct flash_program, data); - flash_pgm.p.program.byte_count = IAP_PGM_CHUNKSIZE; - flash_pgm.p.program.cpu_clk_khz = CPU_CLK_KHZ; - flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; - lpc11x_iap_call(t, &flash_pgm.p, sizeof(flash_pgm)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { - return -1; - } - - } - - return 0; -} diff --git a/src/lpc43xx.c b/src/lpc43xx.c index ad93c8d..5181b8b 100644 --- a/src/lpc43xx.c +++ b/src/lpc43xx.c @@ -44,31 +44,14 @@ #define IAP_PGM_CHUNKSIZE 4096 - -#define FLASH_BANK_A_BASE 0x1A000000 -#define FLASH_BANK_A_SIZE 0x80000 -#define FLASH_BANK_B_BASE 0x1B000000 -#define FLASH_BANK_B_SIZE 0x80000 #define FLASH_NUM_BANK 2 #define FLASH_NUM_SECTOR 15 -#define FLASH_LARGE_SECTOR_OFFSET 0x00010000 - -struct flash_program { - struct flash_param p; - uint8_t data[IAP_PGM_CHUNKSIZE]; -}; static bool lpc43xx_cmd_erase(target *t, int argc, const char *argv[]); static bool lpc43xx_cmd_reset(target *t, int argc, const char *argv[]); static bool lpc43xx_cmd_mkboot(target *t, int argc, const char *argv[]); static int lpc43xx_flash_init(target *t); -static void lpc43xx_iap_call(target *t, struct flash_param *param, - unsigned param_len); -static int lpc43xx_flash_prepare(target *t, - uint32_t addr, int len); -static int lpc43xx_flash_erase(target *t, uint32_t addr, size_t len); -static int lpc43xx_flash_write(target *t, - uint32_t dest, const uint8_t *src, size_t len); +static int lpc43xx_flash_erase(struct target_flash *f, uint32_t addr, size_t len); static void lpc43xx_set_internal_clock(target *t); static void lpc43xx_wdt_set_period(target *t); static void lpc43xx_wdt_pet(target *t); @@ -80,34 +63,26 @@ const struct command_s lpc43xx_cmd_list[] = { {NULL, NULL, NULL} }; -/* blocksize is the erasure block size */ -static const char lpc4337_xml_memory_map[] = "" -/* - "" -*/ -"" -" " -" " -" 0x2000" -" " -" " -" 0x10000" -" " -" " -" " -" 0x2000" -" " -" " -" 0x10000" -" " -" " -""; +void lpc43xx_add_flash(target *t, uint32_t iap_entry, + uint8_t bank, uint8_t base_sector, + uint32_t addr, size_t len, size_t erasesize) +{ + struct lpc_flash *lf = lpc_add_flash(t, addr, len); + lf->f.erase = lpc43xx_flash_erase; + lf->f.blocksize = erasesize; + lf->f.buf_size = IAP_PGM_CHUNKSIZE; + lf->bank = bank; + lf->base_sector = base_sector; + lf->iap_entry = iap_entry; + lf->iap_ram = IAP_RAM_BASE; + lf->iap_msp = IAP_RAM_BASE + IAP_RAM_SIZE; + lf->wdt_kick = lpc43xx_wdt_pet; +} bool lpc43xx_probe(target *t) { uint32_t chipid, cpuid; + uint32_t iap_entry; chipid = target_mem_read32(t, LPC43XX_CHIPID); cpuid = target_mem_read32(t, ARM_CPUID); @@ -120,10 +95,20 @@ bool lpc43xx_probe(target *t) if (cpuid == 0x410FC241) { /* LPC4337 */ - t->xml_mem_map = lpc4337_xml_memory_map; - t->flash_erase = lpc43xx_flash_erase; - t->flash_write = lpc43xx_flash_write; + iap_entry = target_mem_read32(t, + IAP_ENTRYPOINT_LOCATION); + target_add_ram(t, 0, 0x1A000000); + lpc43xx_add_flash(t, iap_entry, 0, 0, + 0x1A000000, 0x10000, 0x2000); + lpc43xx_add_flash(t, iap_entry, 0, 8, + 0x1A010000, 0x70000, 0x10000); + target_add_ram(t, 0x1A080000, 0xF80000); + lpc43xx_add_flash(t, iap_entry, 1, 0, + 0x1B000000, 0x10000, 0x2000); + lpc43xx_add_flash(t, iap_entry, 1, 8, + 0x1B010000, 0x70000, 0x10000); target_add_commands(t, lpc43xx_cmd_list, "LPC43xx"); + target_add_ram(t, 0x1B080000, 0xE4F80000UL); } break; case 0x4100C200: @@ -173,34 +158,18 @@ static bool lpc43xx_cmd_erase(target *t, int argc, const char *argv[]) (void)argc; (void)argv; - uint32_t bank = 0; - struct flash_program flash_pgm; - lpc43xx_flash_init(t); - for (bank = 0; bank < FLASH_NUM_BANK; bank++) + for (int bank = 0; bank < FLASH_NUM_BANK; bank++) { - flash_pgm.p.command = IAP_CMD_PREPARE; - flash_pgm.p.prepare.start_sector = 0; - flash_pgm.p.prepare.end_sector = FLASH_NUM_SECTOR-1; - flash_pgm.p.prepare.flash_bank = bank; - flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; - lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { + struct lpc_flash *f = (struct lpc_flash *)t->flash; + if (lpc_iap_call(f, IAP_CMD_PREPARE, + 0, FLASH_NUM_SECTOR-1, bank)) return false; - } - flash_pgm.p.command = IAP_CMD_ERASE; - flash_pgm.p.erase.start_sector = 0; - flash_pgm.p.prepare.end_sector = FLASH_NUM_SECTOR-1; - flash_pgm.p.erase.cpu_clk_khz = CPU_CLK_KHZ; - flash_pgm.p.erase.flash_bank = bank; - flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; - lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) - { + if (lpc_iap_call(f, IAP_CMD_ERASE, + 0, FLASH_NUM_SECTOR-1, CPU_CLK_KHZ, bank)) return false; - } } gdb_outf("Erase OK.\n"); @@ -216,215 +185,26 @@ static int lpc43xx_flash_init(target *t) /* Force internal clock */ lpc43xx_set_internal_clock(t); - struct flash_program flash_pgm; - /* Initialize flash IAP */ - flash_pgm.p.command = IAP_CMD_INIT; - flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; - lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) + struct lpc_flash *f = (struct lpc_flash *)t->flash; + if (lpc_iap_call(f, IAP_CMD_INIT)) return -1; return 0; } - - -/** - * @brief find a sector number given linear offset - */ -static int32_t flash_bank(uint32_t addr) +static int lpc43xx_flash_erase(struct target_flash *f, uint32_t addr, size_t len) { - if ((addr >= FLASH_BANK_A_BASE) && - (addr < (FLASH_BANK_A_BASE + FLASH_BANK_A_SIZE))) - return 0; - if ((addr >= FLASH_BANK_B_BASE) && - (addr < (FLASH_BANK_B_BASE + FLASH_BANK_B_SIZE))) - return 1; - - return -1; -} - -/** - * @brief find a sector number given linear offset - */ -static int32_t sector_number(uint32_t addr) -{ - int32_t bank = flash_bank(addr); - - switch (bank) { - case 0: - addr = addr - FLASH_BANK_A_BASE; - break; - case 1: - addr = addr - FLASH_BANK_B_BASE; - break; - default: + if (lpc43xx_flash_init(f->t)) return -1; - } - /* from 47.5 "Sector numbers" (page 1218) UM10503.pdf (Rev 1.6) */ - if (addr < FLASH_LARGE_SECTOR_OFFSET) { - return addr >> 13; - } else { - return 8 + ((addr - FLASH_LARGE_SECTOR_OFFSET) >> 16); - } -} - -static void lpc43xx_iap_call(target *t, struct flash_param *param, unsigned param_len) -{ - uint32_t regs[t->regs_size / sizeof(uint32_t)]; - uint32_t iap_entry; - - /* Pet WDT before each IAP call, if it is on */ - lpc43xx_wdt_pet(t); - - target_mem_read(t, &iap_entry, IAP_ENTRYPOINT_LOCATION, sizeof(iap_entry)); - - /* fill out the remainder of the parameters and copy the structure to RAM */ - param->opcode = ARM_THUMB_BREAKPOINT; - param->pad0 = 0x0000; - target_mem_write(t, IAP_RAM_BASE, param, param_len); - - /* set up for the call to the IAP ROM */ - target_regs_read(t, regs); - regs[0] = IAP_RAM_BASE + offsetof(struct flash_param, command); - regs[1] = IAP_RAM_BASE + offsetof(struct flash_param, result); - - regs[REG_MSP] = IAP_RAM_BASE + IAP_RAM_SIZE; - regs[REG_LR] = IAP_RAM_BASE | 1; - regs[REG_PC] = iap_entry; - target_regs_write(t, regs); - - /* start the target and wait for it to halt again */ - target_halt_resume(t, 0); - while (!target_halt_wait(t)); - - /* copy back just the parameters structure */ - target_mem_read(t, param, IAP_RAM_BASE, sizeof(struct flash_param)); -} - -static int lpc43xx_flash_prepare(target *t, uint32_t addr, int len) -{ - struct flash_program flash_pgm; - - /* prepare the sector(s) to be erased */ - memset(&flash_pgm.p, 0, sizeof(flash_pgm.p)); - flash_pgm.p.command = IAP_CMD_PREPARE; - flash_pgm.p.prepare.start_sector = sector_number(addr); - flash_pgm.p.prepare.end_sector = sector_number(addr+len); - flash_pgm.p.prepare.flash_bank = flash_bank(addr); - - lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { - return -1; - } - - return 0; -} - -static int lpc43xx_flash_erase(target *t, uint32_t addr, size_t len) -{ - struct flash_program flash_pgm; - - /* min block size */ - if (addr % 8192) - return -1; - - /* init */ - if (lpc43xx_flash_init(t)) - return -1; - - /* prepare... */ - if (lpc43xx_flash_prepare(t, addr, len)) - return -1; - - /* and now erase them */ - flash_pgm.p.command = IAP_CMD_ERASE; - flash_pgm.p.erase.start_sector = sector_number(addr); - flash_pgm.p.erase.end_sector = sector_number(addr+len); - flash_pgm.p.erase.cpu_clk_khz = CPU_CLK_KHZ; - flash_pgm.p.erase.flash_bank = flash_bank(addr); - flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; - lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { - return -1; - } - - /* check erase ok */ - flash_pgm.p.command = IAP_CMD_BLANKCHECK; - flash_pgm.p.blank_check.start_sector = sector_number(addr); - flash_pgm.p.blank_check.end_sector = sector_number(addr+len); - flash_pgm.p.blank_check.flash_bank = flash_bank(addr); - flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; - lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { - return -1; - } - - return 0; + return lpc_flash_erase(f, addr, len); } static void lpc43xx_set_internal_clock(target *t) { const uint32_t val2 = (1 << 11) | (1 << 24); - target_mem_write(t, 0x40050000 + 0x06C, &val2, sizeof(val2)); -} - -static int lpc43xx_flash_write(target *t, - uint32_t dest, const uint8_t *src, size_t len) -{ - unsigned first_chunk = dest / IAP_PGM_CHUNKSIZE; - unsigned last_chunk = (dest + len - 1) / IAP_PGM_CHUNKSIZE; - unsigned chunk_offset = dest % IAP_PGM_CHUNKSIZE; - unsigned chunk; - struct flash_program flash_pgm; - - for (chunk = first_chunk; chunk <= last_chunk; chunk++) { - - DEBUG("chunk %u len %zu\n", chunk, len); - /* first and last chunk may require special handling */ - if ((chunk == first_chunk) || (chunk == last_chunk)) { - - /* fill with all ff to avoid sector rewrite corrupting other writes */ - memset(flash_pgm.data, 0xff, sizeof(flash_pgm.data)); - - /* copy as much as fits */ - size_t copylen = IAP_PGM_CHUNKSIZE - chunk_offset; - if (copylen > len) - copylen = len; - - memcpy(flash_pgm.data + chunk_offset, src, copylen); - - /* update to suit */ - len -= copylen; - src += copylen; - chunk_offset = 0; - } else { - /* interior chunk, must be aligned and full-sized */ - memcpy(flash_pgm.data, src, IAP_PGM_CHUNKSIZE); - len -= IAP_PGM_CHUNKSIZE; - src += IAP_PGM_CHUNKSIZE; - } - - /* prepare... */ - if (lpc43xx_flash_prepare(t, chunk * IAP_PGM_CHUNKSIZE, IAP_PGM_CHUNKSIZE)) - return -1; - - /* set the destination address and program */ - flash_pgm.p.command = IAP_CMD_PROGRAM; - flash_pgm.p.program.dest = chunk * IAP_PGM_CHUNKSIZE; - flash_pgm.p.program.source = IAP_RAM_BASE + offsetof(struct flash_program, data); - flash_pgm.p.program.byte_count = IAP_PGM_CHUNKSIZE; - flash_pgm.p.program.cpu_clk_khz = CPU_CLK_KHZ; - flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; - lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { - return -1; - } - } - - return 0; + target_mem_write32(t, 0x40050000 + 0x06C, val2); } /* @@ -450,15 +230,10 @@ static bool lpc43xx_cmd_mkboot(target *t, int argc, const char *argv[]) } lpc43xx_flash_init(t); - struct flash_program flash_pgm; /* special command to compute/write magic vector for signature */ - flash_pgm.p.command = IAP_CMD_SET_ACTIVE_BANK; - flash_pgm.p.make_active.flash_bank = bank; - flash_pgm.p.make_active.cpu_clk_khz = CPU_CLK_KHZ; - flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS; - lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm)); - if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) { + struct lpc_flash *f = (struct lpc_flash *)t->flash; + if (lpc_iap_call(f, IAP_CMD_SET_ACTIVE_BANK, bank, CPU_CLK_KHZ)) { gdb_outf("Set bootable failed.\n"); return false; } @@ -469,33 +244,23 @@ static bool lpc43xx_cmd_mkboot(target *t, int argc, const char *argv[]) static void lpc43xx_wdt_set_period(target *t) { - uint32_t wdt_mode = 0; /* Check if WDT is on */ - target_mem_read(t, &wdt_mode, LPC43XX_WDT_MODE, sizeof(wdt_mode)); + uint32_t wdt_mode = target_mem_read32(t, LPC43XX_WDT_MODE); /* If WDT on, we can't disable it, but we may be able to set a long period */ if (wdt_mode && !(wdt_mode & LPC43XX_WDT_PROTECT)) - { - const uint32_t wdt_period = LPC43XX_WDT_PERIOD_MAX; - - - target_mem_write(t, LPC43XX_WDT_CNT, &wdt_period, sizeof(wdt_period)); - } + target_mem_write32(t, LPC43XX_WDT_CNT, LPC43XX_WDT_PERIOD_MAX); } static void lpc43xx_wdt_pet(target *t) { - uint32_t wdt_mode = 0; /* Check if WDT is on */ - target_mem_read(t, &wdt_mode, LPC43XX_WDT_MODE, sizeof(wdt_mode)); + uint32_t wdt_mode = target_mem_read32(t, LPC43XX_WDT_MODE); /* If WDT on, pet */ - if (wdt_mode) - { - const uint32_t feed1 = 0xAA;; - const uint32_t feed2 = 0x55;; - - target_mem_write(t, LPC43XX_WDT_FEED, &feed1, sizeof(feed1)); - target_mem_write(t, LPC43XX_WDT_FEED, &feed2, sizeof(feed2)); + if (wdt_mode) { + target_mem_write32(t, LPC43XX_WDT_FEED, 0xAA); + target_mem_write32(t, LPC43XX_WDT_FEED, 0xFF); } } + diff --git a/src/lpc_common.c b/src/lpc_common.c new file mode 100644 index 0000000..d9abc76 --- /dev/null +++ b/src/lpc_common.c @@ -0,0 +1,135 @@ +/* + * This file is part of the Black Magic Debug project. + * + * Copyright (C) 2015 Gareth McMullin + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#include "general.h" +#include "target.h" +#include "cortexm.h" +#include "lpc_common.h" + +#include + +struct flash_param { + uint16_t opcode; + uint16_t pad0; + uint32_t command; + uint32_t words[4]; + uint32_t result; +} __attribute__((aligned(4))); + + +struct lpc_flash *lpc_add_flash(target *t, uint32_t addr, size_t length) +{ + struct lpc_flash *lf = calloc(1, sizeof(*lf)); + struct target_flash *f = &lf->f; + f->start = addr; + f->length = length; + f->erase = lpc_flash_erase; + f->write = target_flash_write_buffered; + f->done = target_flash_done_buffered; + f->write_buf = lpc_flash_write; + f->erased = 0xff; + target_add_flash(t, f); + return lf; +} + +enum iap_status lpc_iap_call(struct lpc_flash *f, enum iap_cmd cmd, ...) +{ + target *t = f->f.t; + struct flash_param param = { + .opcode = ARM_THUMB_BREAKPOINT, + .command = cmd, + }; + + /* Pet WDT before each IAP call, if it is on */ + if (f->wdt_kick) + f->wdt_kick(t); + + /* fill out the remainder of the parameters */ + va_list ap; + va_start(ap, cmd); + for (int i = 0; i < 4; i++) + param.words[i] = va_arg(ap, uint32_t); + va_end(ap); + + /* copy the structure to RAM */ + target_mem_write(t, f->iap_ram, ¶m, sizeof(param)); + + /* set up for the call to the IAP ROM */ + uint32_t regs[t->regs_size / sizeof(uint32_t)]; + target_regs_read(t, regs); + regs[0] = f->iap_ram + offsetof(struct flash_param, command); + regs[1] = f->iap_ram + offsetof(struct flash_param, result); + regs[REG_MSP] = f->iap_msp; + regs[REG_LR] = f->iap_ram | 1; + regs[REG_PC] = f->iap_entry; + target_regs_write(t, regs); + + /* start the target and wait for it to halt again */ + target_halt_resume(t, false); + while (!target_halt_wait(t)); + + /* copy back just the parameters structure */ + target_mem_read(t, ¶m, f->iap_ram, sizeof(param)); + return param.result; +} + +static uint8_t lpc_sector_for_addr(struct lpc_flash *f, uint32_t addr) +{ + return f->base_sector + (addr - f->f.start) / f->f.blocksize; +} + +int lpc_flash_erase(struct target_flash *tf, uint32_t addr, size_t len) +{ + struct lpc_flash *f = (struct lpc_flash *)tf; + uint32_t start = lpc_sector_for_addr(f, addr); + uint32_t end = lpc_sector_for_addr(f, addr + len - 1); + + if (lpc_iap_call(f, IAP_CMD_PREPARE, start, end, f->bank)) + return -1; + + /* and now erase them */ + if (lpc_iap_call(f, IAP_CMD_ERASE, start, end, CPU_CLK_KHZ, f->bank)) + return -2; + + /* check erase ok */ + if (lpc_iap_call(f, IAP_CMD_BLANKCHECK, start, end, f->bank)) + return -3; + + return 0; +} + +int lpc_flash_write(struct target_flash *tf, + uint32_t dest, const void *src, size_t len) +{ + struct lpc_flash *f = (struct lpc_flash *)tf; + /* prepare... */ + uint32_t sector = lpc_sector_for_addr(f, dest); + if (lpc_iap_call(f, IAP_CMD_PREPARE, sector, sector, f->bank)) + return -1; + + /* Write payload to target ram */ + uint32_t bufaddr = ALIGN(f->iap_ram + sizeof(struct flash_param), 4); + target_mem_write(f->f.t, bufaddr, src, len); + + /* set the destination address and program */ + if (lpc_iap_call(f, IAP_CMD_PROGRAM, dest, bufaddr, len, CPU_CLK_KHZ)) + return -2; + + return 0; +} + -- cgit v1.2.3 From 24122aa31894524867536469c5a9b055c82b25af Mon Sep 17 00:00:00 2001 From: Gareth McMullin Date: Sat, 11 Apr 2015 16:08:25 -0700 Subject: lpc43xx: add chipid for LPC43S37. --- src/lpc43xx.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/lpc43xx.c') diff --git a/src/lpc43xx.c b/src/lpc43xx.c index 5181b8b..99ceb00 100644 --- a/src/lpc43xx.c +++ b/src/lpc43xx.c @@ -89,6 +89,7 @@ bool lpc43xx_probe(target *t) switch(chipid) { case 0x4906002B: /* Parts with on-chip flash */ + case 0x7906002B: /* LM43S?? - Undocumented? */ switch (cpuid & 0xFF00FFF0) { case 0x4100C240: t->driver = "LPC43xx Cortex-M4"; -- cgit v1.2.3 From 9009ed6581fddbd5c7cc1353aaec7144c4f778f6 Mon Sep 17 00:00:00 2001 From: Gareth McMullin Date: Sat, 11 Apr 2015 16:08:59 -0700 Subject: cortexm: Add target option to inhibit assersion of SRST. --- src/cortexm.c | 6 ++++-- src/include/cortexm.h | 2 ++ src/lpc43xx.c | 1 + 3 files changed, 7 insertions(+), 2 deletions(-) (limited to 'src/lpc43xx.c') diff --git a/src/cortexm.c b/src/cortexm.c index e7bed5b..028af21 100644 --- a/src/cortexm.c +++ b/src/cortexm.c @@ -418,8 +418,10 @@ static void cortexm_pc_write(target *t, const uint32_t val) * using the core debug registers in the NVIC. */ static void cortexm_reset(target *t) { - jtagtap_srst(true); - jtagtap_srst(false); + if ((t->target_options & CORTEXM_TOPT_INHIBIT_SRST) == 0) { + jtagtap_srst(true); + jtagtap_srst(false); + } /* Read DHCSR here to clear S_RESET_ST bit before reset */ target_mem_read32(t, CORTEXM_DHCSR); diff --git a/src/include/cortexm.h b/src/include/cortexm.h index 0a9c3ae..de57112 100644 --- a/src/include/cortexm.h +++ b/src/include/cortexm.h @@ -153,6 +153,8 @@ #define ARM_THUMB_BREAKPOINT 0xBE00 +#define CORTEXM_TOPT_INHIBIT_SRST (1 << 2) + bool cortexm_attach(target *t); void cortexm_detach(target *t); void cortexm_halt_resume(target *t, bool step); diff --git a/src/lpc43xx.c b/src/lpc43xx.c index 99ceb00..b6c499a 100644 --- a/src/lpc43xx.c +++ b/src/lpc43xx.c @@ -110,6 +110,7 @@ bool lpc43xx_probe(target *t) 0x1B010000, 0x70000, 0x10000); target_add_commands(t, lpc43xx_cmd_list, "LPC43xx"); target_add_ram(t, 0x1B080000, 0xE4F80000UL); + t->target_options |= CORTEXM_TOPT_INHIBIT_SRST; } break; case 0x4100C200: -- cgit v1.2.3