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-rw-r--r--src/sam3x.c353
1 files changed, 269 insertions, 84 deletions
diff --git a/src/sam3x.c b/src/sam3x.c
index d348701..0566718 100644
--- a/src/sam3x.c
+++ b/src/sam3x.c
@@ -22,24 +22,19 @@
* the device, providing the XML memory map and Flash memory programming.
*/
-#include <stdlib.h>
-#include <string.h>
-
#include "general.h"
#include "adiv5.h"
#include "target.h"
#include "command.h"
#include "gdb_packet.h"
-static int sam3x_flash_erase(struct target_s *target, uint32_t addr, int len);
-static int sam3x_flash_write(struct target_s *target, uint32_t dest,
- const uint8_t *src, int len);
+static int sam3x_flash_erase(target *t, uint32_t addr, size_t len);
+static int sam3x_flash_write(target *t, uint32_t dest,
+ const uint8_t *src, size_t len);
static bool sam3x_cmd_gpnvm_get(target *t);
static bool sam3x_cmd_gpnvm_set(target *t, int argc, char *argv[]);
-static const char sam3x_driver_str[] = "Atmel SAM3X";
-
const struct command_s sam3x_cmd_list[] = {
{"gpnvm_get", (cmd_handler)sam3x_cmd_gpnvm_get, "Get GPVNM value"},
{"gpnvm_set", (cmd_handler)sam3x_cmd_gpnvm_set, "Set GPVNM bit"},
@@ -58,13 +53,51 @@ static const char sam3x_xml_memory_map[] = "<?xml version=\"1.0\"?>"
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x200000\"/>"
"</memory-map>";
+static const char sam3n_xml_memory_map[] = "<?xml version=\"1.0\"?>"
+/* "<!DOCTYPE memory-map "
+ " PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
+ " \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"*/
+ "<memory-map>"
+ " <memory type=\"flash\" start=\"0x400000\" length=\"0x400000\">"
+ " <property name=\"blocksize\">0x100</property>"
+ " </memory>"
+ " <memory type=\"rom\" start=\"0x800000\" length=\"0x400000\"/>"
+ " <memory type=\"ram\" start=\"0x20000000\" length=\"0x200000\"/>"
+ "</memory-map>";
+
+static const char sam3u_xml_memory_map[] = "<?xml version=\"1.0\"?>"
+/* "<!DOCTYPE memory-map "
+ " PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
+ " \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"*/
+ "<memory-map>"
+ " <memory type=\"flash\" start=\"0x80000\" length=\"0x100000\">"
+ " <property name=\"blocksize\">0x100</property>"
+ " </memory>"
+ " <memory type=\"rom\" start=\"0x180000\" length=\"0x200000\"/>"
+ " <memory type=\"ram\" start=\"0x20000000\" length=\"0x200000\"/>"
+ "</memory-map>";
+
+static const char sam4s_xml_memory_map[] = "<?xml version=\"1.0\"?>"
+/* "<!DOCTYPE memory-map "
+ " PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
+ " \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"*/
+ "<memory-map>"
+ " <memory type=\"flash\" start=\"0x400000\" length=\"0x400000\">"
+ " <property name=\"blocksize\">0x200</property>"
+ " </memory>"
+ " <memory type=\"rom\" start=\"0x800000\" length=\"0x400000\"/>"
+ " <memory type=\"ram\" start=\"0x20000000\" length=\"0x400000\"/>"
+ "</memory-map>";
/* Enhanced Embedded Flash Controller (EEFC) Register Map */
-#define EEFC_BASE(x) (0x400E0A00+((x)*0x400))
-#define EEFC_FMR(x) (EEFC_BASE(x)+0x00)
-#define EEFC_FCR(x) (EEFC_BASE(x)+0x04)
-#define EEFC_FSR(x) (EEFC_BASE(x)+0x08)
-#define EEFC_FRR(x) (EEFC_BASE(x)+0x0C)
+#define SAM3N_EEFC_BASE 0x400E0A00
+#define SAM3X_EEFC_BASE(x) (0x400E0A00+((x)*0x400))
+#define SAM3U_EEFC_BASE(x) (0x400E0800+((x)*0x200))
+#define SAM4S_EEFC_BASE(x) (0x400E0A00+((x)*0x200))
+#define EEFC_FMR(base) ((base)+0x00)
+#define EEFC_FCR(base) ((base)+0x04)
+#define EEFC_FSR(base) ((base)+0x08)
+#define EEFC_FRR(base) ((base)+0x0C)
#define EEFC_FCR_FKEY (0x5A << 24)
#define EEFC_FCR_FCMD_GETD 0x00
@@ -73,6 +106,7 @@ static const char sam3x_xml_memory_map[] = "<?xml version=\"1.0\"?>"
#define EEFC_FCR_FCMD_EWP 0x03
#define EEFC_FCR_FCMD_EWPL 0x04
#define EEFC_FCR_FCMD_EA 0x05
+#define EEFC_FCR_FCMD_EPA 0x07
#define EEFC_FCR_FCMD_SLB 0x08
#define EEFC_FCR_FCMD_CLB 0x09
#define EEFC_FCR_FCMD_GLB 0x0A
@@ -87,142 +121,292 @@ static const char sam3x_xml_memory_map[] = "<?xml version=\"1.0\"?>"
#define EEFC_FSR_FLOCKE (1 << 2)
#define EEFC_FSR_ERROR (EEFC_FSR_FCMDE | EEFC_FSR_FLOCKE)
-#define CHIPID_CIDR 0x400E0940
+#define SAM3X_CHIPID_CIDR 0x400E0940
+#define SAM3N_CHIPID_CIDR 0x400E0740
+#define SAM3S_CHIPID_CIDR 0x400E0740
+#define SAM3U_CHIPID_CIDR 0x400E0740
+#define SAM4S_CHIPID_CIDR 0x400E0740
#define CHIPID_CIDR_VERSION_MASK (0x1F << 0)
#define CHIPID_CIDR_EPROC_CM3 (0x03 << 5)
+#define CHIPID_CIDR_EPROC_CM4 (0x07 << 5)
#define CHIPID_CIDR_EPROC_MASK (0x07 << 5)
#define CHIPID_CIDR_NVPSIZ_MASK (0x0F << 8)
#define CHIPID_CIDR_NVPSIZ_128K (0x07 << 8)
#define CHIPID_CIDR_NVPSIZ_256K (0x09 << 8)
#define CHIPID_CIDR_NVPSIZ_512K (0x0A << 8)
+#define CHIPID_CIDR_NVPSIZ_1024K (0x0C << 8)
+#define CHIPID_CIDR_NVPSIZ_2048K (0x0E << 8)
#define CHIPID_CIDR_NVPSIZ2_MASK (0x0F << 12)
#define CHIPID_CIDR_SRAMSIZ_MASK (0x0F << 16)
#define CHIPID_CIDR_ARCH_MASK (0xFF << 20)
+#define CHIPID_CIDR_ARCH_SAM3UxC (0x80 << 20)
+#define CHIPID_CIDR_ARCH_SAM3UxE (0x81 << 20)
#define CHIPID_CIDR_ARCH_SAM3XxC (0x84 << 20)
#define CHIPID_CIDR_ARCH_SAM3XxE (0x85 << 20)
#define CHIPID_CIDR_ARCH_SAM3XxG (0x86 << 20)
+#define CHIPID_CIDR_ARCH_SAM3NxA (0x93 << 20)
+#define CHIPID_CIDR_ARCH_SAM3NxB (0x94 << 20)
+#define CHIPID_CIDR_ARCH_SAM3NxC (0x95 << 20)
+#define CHIPID_CIDR_ARCH_SAM3SxA (0x88 << 20)
+#define CHIPID_CIDR_ARCH_SAM3SxB (0x89 << 20)
+#define CHIPID_CIDR_ARCH_SAM3SxC (0x8A << 20)
+#define CHIPID_CIDR_ARCH_SAM4SxA (0x88 << 20)
+#define CHIPID_CIDR_ARCH_SAM4SxB (0x89 << 20)
+#define CHIPID_CIDR_ARCH_SAM4SxC (0x8A << 20)
#define CHIPID_CIDR_NVPTYP_MASK (0x07 << 28)
#define CHIPID_CIDR_NVPTYP_FLASH (0x02 << 28)
#define CHIPID_CIDR_NVPTYP_ROM_FLASH (0x03 << 28)
#define CHIPID_CIDR_EXT (0x01 << 31)
-#define PAGE_SIZE 256
+#define SAM3_PAGE_SIZE 256
+#define SAM4_PAGE_SIZE 512
-bool sam3x_probe(struct target_s *target)
+bool sam3x_probe(target *t)
{
- ADIv5_AP_t *ap = adiv5_target_ap(target);
-
- target->idcode = adiv5_ap_mem_read(ap, CHIPID_CIDR);
+ t->idcode = target_mem_read32(t, SAM3X_CHIPID_CIDR);
/* FIXME: Check for all variants with similar flash interface */
- switch (target->idcode & (CHIPID_CIDR_ARCH_MASK | CHIPID_CIDR_EPROC_MASK)) {
+ switch (t->idcode & (CHIPID_CIDR_ARCH_MASK | CHIPID_CIDR_EPROC_MASK)) {
case CHIPID_CIDR_ARCH_SAM3XxC | CHIPID_CIDR_EPROC_CM3:
case CHIPID_CIDR_ARCH_SAM3XxE | CHIPID_CIDR_EPROC_CM3:
case CHIPID_CIDR_ARCH_SAM3XxG | CHIPID_CIDR_EPROC_CM3:
- target->driver = sam3x_driver_str;
- target->xml_mem_map = sam3x_xml_memory_map;
- target->flash_erase = sam3x_flash_erase;
- target->flash_write = sam3x_flash_write;
- target_add_commands(target, sam3x_cmd_list, sam3x_driver_str);
+ t->driver = "Atmel SAM3X";
+ t->xml_mem_map = sam3x_xml_memory_map;
+ t->flash_erase = sam3x_flash_erase;
+ t->flash_write = sam3x_flash_write;
+ target_add_commands(t, sam3x_cmd_list, "SAM3X");
+ return true;
+ }
+
+ t->idcode = target_mem_read32(t, SAM3N_CHIPID_CIDR);
+ switch (t->idcode & (CHIPID_CIDR_ARCH_MASK | CHIPID_CIDR_EPROC_MASK)) {
+ case CHIPID_CIDR_ARCH_SAM3NxA | CHIPID_CIDR_EPROC_CM3:
+ case CHIPID_CIDR_ARCH_SAM3NxB | CHIPID_CIDR_EPROC_CM3:
+ case CHIPID_CIDR_ARCH_SAM3NxC | CHIPID_CIDR_EPROC_CM3:
+ t->driver = "Atmel SAM3N";
+ t->xml_mem_map = sam3n_xml_memory_map;
+ t->flash_erase = sam3x_flash_erase;
+ t->flash_write = sam3x_flash_write;
+ target_add_commands(t, sam3x_cmd_list, "SAM3N");
+ return true;
+ }
+
+ t->idcode = target_mem_read32(t, SAM3S_CHIPID_CIDR);
+ switch (t->idcode & (CHIPID_CIDR_ARCH_MASK | CHIPID_CIDR_EPROC_MASK)) {
+ case CHIPID_CIDR_ARCH_SAM3SxA | CHIPID_CIDR_EPROC_CM3:
+ case CHIPID_CIDR_ARCH_SAM3SxB | CHIPID_CIDR_EPROC_CM3:
+ case CHIPID_CIDR_ARCH_SAM3SxC | CHIPID_CIDR_EPROC_CM3:
+ t->driver = "Atmel SAM3S";
+ t->xml_mem_map = sam3n_xml_memory_map;
+ t->flash_erase = sam3x_flash_erase;
+ t->flash_write = sam3x_flash_write;
+ target_add_commands(t, sam3x_cmd_list, "SAM3S");
+ return true;
+ }
+
+ t->idcode = target_mem_read32(t, SAM3U_CHIPID_CIDR);
+ switch (t->idcode & (CHIPID_CIDR_ARCH_MASK | CHIPID_CIDR_EPROC_MASK)) {
+ case CHIPID_CIDR_ARCH_SAM3UxC | CHIPID_CIDR_EPROC_CM3:
+ case CHIPID_CIDR_ARCH_SAM3UxE | CHIPID_CIDR_EPROC_CM3:
+ t->driver = "Atmel SAM3U";
+ t->xml_mem_map = sam3u_xml_memory_map;
+ t->flash_erase = sam3x_flash_erase;
+ t->flash_write = sam3x_flash_write;
+ target_add_commands(t, sam3x_cmd_list, "SAM3U");
+ return true;
+ }
+
+ t->idcode = target_mem_read32(t, SAM4S_CHIPID_CIDR);
+ switch (t->idcode & (CHIPID_CIDR_ARCH_MASK | CHIPID_CIDR_EPROC_MASK)) {
+ case CHIPID_CIDR_ARCH_SAM4SxA | CHIPID_CIDR_EPROC_CM4:
+ case CHIPID_CIDR_ARCH_SAM4SxB | CHIPID_CIDR_EPROC_CM4:
+ case CHIPID_CIDR_ARCH_SAM4SxC | CHIPID_CIDR_EPROC_CM4:
+ t->driver = "Atmel SAM4S";
+ t->xml_mem_map = sam4s_xml_memory_map;
+ t->flash_erase = sam3x_flash_erase;
+ t->flash_write = sam3x_flash_write;
+ target_add_commands(t, sam3x_cmd_list, "SAM4S");
return true;
}
+
return false;
}
static int
-sam3x_flash_cmd(struct target_s *target, int bank, uint8_t cmd, uint16_t arg)
+sam3x_flash_cmd(target *t, uint32_t base, uint8_t cmd, uint16_t arg)
{
- ADIv5_AP_t *ap = adiv5_target_ap(target);
-
- adiv5_ap_mem_write(ap, EEFC_FCR(bank),
- EEFC_FCR_FKEY | cmd | ((uint32_t)arg << 8));
+ DEBUG("%s: base = 0x%08x cmd = 0x%02X, arg = 0x%06X\n",
+ __func__, base, cmd, arg);
+ target_mem_write32(t, EEFC_FCR(base),
+ EEFC_FCR_FKEY | cmd | ((uint32_t)arg << 8));
- while(!(adiv5_ap_mem_read(ap, EEFC_FSR(bank)) & EEFC_FSR_FRDY))
- if(target_check_error(target))
+ while (!(target_mem_read32(t, EEFC_FSR(base)) & EEFC_FSR_FRDY))
+ if(target_check_error(t))
return -1;
- uint32_t sr = adiv5_ap_mem_read(ap, EEFC_FSR(bank));
+ uint32_t sr = target_mem_read32(t, EEFC_FSR(base));
return sr & EEFC_FSR_ERROR;
}
-static int
-sam3x_flash_bank(struct target_s *target, uint32_t addr, uint32_t *offset)
+static uint32_t
+sam3x_flash_base(target *t, uint32_t addr, uint32_t *offset)
{
- uint32_t half = -1;
- switch (target->idcode & CHIPID_CIDR_NVPSIZ_MASK) {
- case CHIPID_CIDR_NVPSIZ_128K:
- half = 0x00090000;
- break;
- case CHIPID_CIDR_NVPSIZ_256K:
- half = 0x000A0000;
- break;
- case CHIPID_CIDR_NVPSIZ_512K:
- half = 0x000C0000;
- break;
+ if (strcmp(t->driver, "Atmel SAM3X") == 0) {
+ uint32_t half = -1;
+ switch (t->idcode & CHIPID_CIDR_NVPSIZ_MASK) {
+ case CHIPID_CIDR_NVPSIZ_128K:
+ half = 0x00090000;
+ break;
+ case CHIPID_CIDR_NVPSIZ_256K:
+ half = 0x000A0000;
+ break;
+ case CHIPID_CIDR_NVPSIZ_512K:
+ half = 0x000C0000;
+ break;
+ }
+ if (addr > half) {
+ if (offset)
+ *offset = addr - half;
+ return SAM3X_EEFC_BASE(1);
+ } else {
+ if (offset)
+ *offset = addr - 0x80000;
+ return SAM3X_EEFC_BASE(0);
+ }
+ }
+
+ /* The SAM3U has a constant split between both banks */
+ if (strcmp(t->driver, "Atmel SAM3U") == 0) {
+ if (addr >= 0x100000) {
+ if(offset)
+ *offset = addr - 0x100000;
+
+ return SAM3U_EEFC_BASE(1);
+ } else {
+ if(offset)
+ *offset = addr - 0x80000;
+
+ return SAM3U_EEFC_BASE(0);
+ }
}
- if (addr > half) {
- if (offset)
- *offset = addr - half;
- return 1;
+ if (strcmp(t->driver, "Atmel SAM4S") == 0) {
+ uint32_t half = -1;
+ switch (t->idcode & CHIPID_CIDR_NVPSIZ_MASK) {
+ case CHIPID_CIDR_NVPSIZ_128K:
+ case CHIPID_CIDR_NVPSIZ_256K:
+ case CHIPID_CIDR_NVPSIZ_512K:
+ if (offset)
+ *offset = addr - 0x400000;
+ return SAM4S_EEFC_BASE(0);
+ case CHIPID_CIDR_NVPSIZ_1024K:
+ half = 0x480000;
+ break;
+ case CHIPID_CIDR_NVPSIZ_2048K:
+ half = 0x500000;
+ break;
+ }
+ if (addr >= half) {
+ if (offset)
+ *offset = addr - half;
+ return SAM4S_EEFC_BASE(1);
+ } else {
+ if (offset)
+ *offset = addr - 0x400000;
+ return SAM4S_EEFC_BASE(0);
+ }
}
+ /* SAM3N device */
if (offset)
- *offset = addr - 0x80000;
- return 0;
+ *offset = addr - 0x400000;
+ return SAM3N_EEFC_BASE;
}
-static int sam3x_flash_erase(struct target_s *target, uint32_t addr, int len)
+static int sam3x_flash_erase(target *t, uint32_t addr, size_t len)
{
uint32_t offset;
- uint8_t bank = sam3x_flash_bank(target, addr, &offset);
- unsigned chunk = offset / PAGE_SIZE;
- uint8_t buf[PAGE_SIZE];
+ uint32_t base = sam3x_flash_base(t, addr, &offset);
- /* This device doesn't really have a page erase function.
+ /* The SAM4S is the only supported device with a page erase command.
+ * Erasing is done in 8-page chunks. arg[15:2] contains the page
+ * number and arg[1:0] contains 0x1, indicating 8-page chunks.
+ */
+ if (strcmp(t->driver, "Atmel SAM4S") == 0) {
+ unsigned chunk = offset / SAM4_PAGE_SIZE;
+
+ /* Fail if the start address is not 8-page-aligned. */
+ if (chunk % 8 != 0)
+ return -1;
+
+ /* Note that the length might not be a multiple of 8 pages.
+ * In this case, we will erase a few extra pages at the end.
+ */
+ while (len > 0) {
+ int16_t arg = chunk | 0x1;
+ if(sam3x_flash_cmd(t, base, EEFC_FCR_FCMD_EPA, arg))
+ return -1;
+
+ len -= SAM4_PAGE_SIZE * 8;
+ addr += SAM4_PAGE_SIZE * 8;
+ chunk += 8;
+ }
+
+ return 0;
+ }
+
+ /* The SAM3X/SAM3N don't really have a page erase function.
* This Erase/Write page is the best we have, so we write with all
* ones. This does waste time, but what can we do?
*/
+ unsigned chunk = offset / SAM3_PAGE_SIZE;
+ uint8_t buf[SAM3_PAGE_SIZE];
memset(buf, 0xff, sizeof(buf));
/* Only do this once, since it doesn't change. */
- target_mem_write_words(target, addr, (void*)buf, PAGE_SIZE);
+ target_mem_write(t, addr, buf, SAM3_PAGE_SIZE);
while (len) {
- if(sam3x_flash_cmd(target, bank, EEFC_FCR_FCMD_EWP, chunk))
+ if(sam3x_flash_cmd(t, base, EEFC_FCR_FCMD_EWP, chunk))
return -1;
- len -= PAGE_SIZE;
- addr += PAGE_SIZE;
+ len -= SAM3_PAGE_SIZE;
+ addr += SAM3_PAGE_SIZE;
chunk++;
}
return 0;
}
-static int sam3x_flash_write(struct target_s *target, uint32_t dest,
- const uint8_t *src, int len)
+static int sam3x_flash_write(target *t, uint32_t dest,
+ const uint8_t *src, size_t len)
{
+ unsigned page_size;
+ if (strcmp(t->driver, "Atmel SAM4S") == 0) {
+ page_size = SAM4_PAGE_SIZE;
+ } else {
+ page_size = SAM3_PAGE_SIZE;
+ }
uint32_t offset;
- uint8_t bank = sam3x_flash_bank(target, dest, &offset);
- uint8_t buf[PAGE_SIZE];
- unsigned first_chunk = offset / PAGE_SIZE;
- unsigned last_chunk = (offset + len - 1) / PAGE_SIZE;
- offset %= PAGE_SIZE;
+ uint32_t base = sam3x_flash_base(t, dest, &offset);
+ uint8_t buf[page_size];
+ unsigned first_chunk = offset / page_size;
+ unsigned last_chunk = (offset + len - 1) / page_size;
+ offset %= page_size;
dest -= offset;
for (unsigned chunk = first_chunk; chunk <= last_chunk; chunk++) {
-
- DEBUG("chunk %u len %d\n", chunk, len);
+
+ DEBUG("chunk %u len %zu\n", chunk, len);
/* first and last chunk may require special handling */
if ((chunk == first_chunk) || (chunk == last_chunk)) {
/* fill with all ff to avoid sector rewrite corrupting other writes */
memset(buf, 0xff, sizeof(buf));
-
- /* copy as much as fits */
- int copylen = PAGE_SIZE - offset;
+
+ /* copy as much as fits */
+ size_t copylen = page_size - offset;
if (copylen > len)
copylen = len;
memcpy(&buf[offset], src, copylen);
@@ -234,13 +418,13 @@ static int sam3x_flash_write(struct target_s *target, uint32_t dest,
} else {
/* interior chunk, must be aligned and full-sized */
- memcpy(buf, src, PAGE_SIZE);
- len -= PAGE_SIZE;
- src += PAGE_SIZE;
+ memcpy(buf, src, page_size);
+ len -= page_size;
+ src += page_size;
}
- target_mem_write_words(target, dest, (void*)buf, PAGE_SIZE);
- if(sam3x_flash_cmd(target, bank, EEFC_FCR_FCMD_WP, chunk))
+ target_mem_write(t, dest, buf, page_size);
+ if(sam3x_flash_cmd(t, base, EEFC_FCR_FCMD_WP, chunk))
return -1;
}
@@ -249,10 +433,10 @@ static int sam3x_flash_write(struct target_s *target, uint32_t dest,
static bool sam3x_cmd_gpnvm_get(target *t)
{
- ADIv5_AP_t *ap = adiv5_target_ap(t);
-
- sam3x_flash_cmd(t, 0, EEFC_FCR_FCMD_GGPB, 0);
- gdb_outf("GPNVM: 0x%08X\n", adiv5_ap_mem_read(ap, EEFC_FRR(0)));
+ uint32_t base = sam3x_flash_base(t, 0, NULL);
+
+ sam3x_flash_cmd(t, base, EEFC_FCR_FCMD_GGPB, 0);
+ gdb_outf("GPNVM: 0x%08X\n", target_mem_read32(t, EEFC_FRR(base)));
return true;
}
@@ -260,7 +444,8 @@ static bool sam3x_cmd_gpnvm_get(target *t)
static bool sam3x_cmd_gpnvm_set(target *t, int argc, char *argv[])
{
uint32_t bit, cmd;
-
+ uint32_t base = sam3x_flash_base(t, 0, NULL);
+
if (argc != 3) {
gdb_out("usage: monitor gpnvm_set <bit> <val>\n");
return false;
@@ -268,7 +453,7 @@ static bool sam3x_cmd_gpnvm_set(target *t, int argc, char *argv[])
bit = atol(argv[1]);
cmd = atol(argv[2]) ? EEFC_FCR_FCMD_SGPB : EEFC_FCR_FCMD_CGPB;
- sam3x_flash_cmd(t, 0, cmd, bit);
+ sam3x_flash_cmd(t, base, cmd, bit);
sam3x_cmd_gpnvm_get(t);
return true;