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Diffstat (limited to 'src/platforms/stm32/usbuart.c')
-rw-r--r--src/platforms/stm32/usbuart.c147
1 files changed, 120 insertions, 27 deletions
diff --git a/src/platforms/stm32/usbuart.c b/src/platforms/stm32/usbuart.c
index 1c71105..cce2904 100644
--- a/src/platforms/stm32/usbuart.c
+++ b/src/platforms/stm32/usbuart.c
@@ -21,12 +21,28 @@
#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/gpio.h>
#include <libopencm3/stm32/usart.h>
+#include <libopencm3/stm32/timer.h>
#include <libopencm3/cm3/nvic.h>
#include <libopencm3/cm3/scs.h>
#include <libopencm3/usb/usbd.h>
#include <libopencm3/usb/cdc.h>
-#include <platform.h>
+#include "general.h"
+#include "cdcacm.h"
+
+#define USBUART_TIMER_FREQ_HZ 1000000U /* 1us per tick */
+#define USBUART_RUN_FREQ_HZ 5000U /* 200us (or 100 characters at 2Mbps) */
+
+#define FIFO_SIZE 128
+
+/* RX Fifo buffer */
+static uint8_t buf_rx[FIFO_SIZE];
+/* Fifo in pointer, writes assumed to be atomic, should be only incremented within RX ISR */
+static uint8_t buf_rx_in;
+/* Fifo out pointer, writes assumed to be atomic, should be only incremented outside RX ISR */
+static uint8_t buf_rx_out;
+
+static void usbuart_run(void);
void usbuart_init(void)
{
@@ -37,7 +53,7 @@ void usbuart_init(void)
return;
#endif
- rcc_peripheral_enable_clock(&USBUSART_APB_ENR, USBUSART_CLK_ENABLE);
+ rcc_periph_clock_enable(USBUSART_CLK);
UART_PIN_SETUP();
@@ -56,12 +72,79 @@ void usbuart_init(void)
USBUSART_CR1 |= USART_CR1_RXNEIE;
nvic_set_priority(USBUSART_IRQ, IRQ_PRI_USBUSART);
nvic_enable_irq(USBUSART_IRQ);
+
+ /* Setup timer for running deferred FIFO processing */
+ USBUSART_TIM_CLK_EN();
+ timer_reset(USBUSART_TIM);
+ timer_set_mode(USBUSART_TIM, TIM_CR1_CKD_CK_INT,
+ TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
+ timer_set_prescaler(USBUSART_TIM,
+ rcc_ppre2_frequency / USBUART_TIMER_FREQ_HZ * 2 - 1);
+ timer_set_period(USBUSART_TIM,
+ USBUART_TIMER_FREQ_HZ / USBUART_RUN_FREQ_HZ - 1);
+
+ /* Setup update interrupt in NVIC */
+ nvic_set_priority(USBUSART_TIM_IRQ, IRQ_PRI_USBUSART_TIM);
+ nvic_enable_irq(USBUSART_TIM_IRQ);
+
+ /* turn the timer on */
+ timer_enable_counter(USBUSART_TIM);
+}
+
+/*
+ * Runs deferred processing for usb uart rx, draining RX FIFO by sending
+ * characters to host PC via CDCACM. Allowed to read from FIFO in pointer,
+ * but not write to it. Allowed to write to FIFO out pointer.
+ */
+static void usbuart_run(void)
+{
+ /* forcibly empty fifo if no USB endpoint */
+ if (cdcacm_get_config() != 1)
+ {
+ buf_rx_out = buf_rx_in;
+ }
+
+ /* if fifo empty, nothing further to do */
+ if (buf_rx_in == buf_rx_out) {
+ /* turn off LED, disable IRQ */
+ timer_disable_irq(USBUSART_TIM, TIM_DIER_UIE);
+ gpio_clear(LED_PORT_UART, LED_UART);
+ }
+ else
+ {
+ uint8_t packet_buf[CDCACM_PACKET_SIZE];
+ uint8_t packet_size = 0;
+ uint8_t buf_out = buf_rx_out;
+
+ /* copy from uart FIFO into local usb packet buffer */
+ while (buf_rx_in != buf_out && packet_size < CDCACM_PACKET_SIZE)
+ {
+ packet_buf[packet_size++] = buf_rx[buf_out++];
+
+ /* wrap out pointer */
+ if (buf_out >= FIFO_SIZE)
+ {
+ buf_out = 0;
+ }
+
+ }
+
+ /* advance fifo out pointer by amount written */
+ buf_rx_out += usbd_ep_write_packet(usbdev,
+ CDCACM_UART_ENDPOINT, packet_buf, packet_size);
+ buf_rx_out %= FIFO_SIZE;
+ }
}
void usbuart_set_line_coding(struct usb_cdc_line_coding *coding)
{
usart_set_baudrate(USBUSART, coding->dwDTERate);
- usart_set_databits(USBUSART, coding->bDataBits);
+
+ if (coding->bParityType)
+ usart_set_databits(USBUSART, coding->bDataBits + 1);
+ else
+ usart_set_databits(USBUSART, coding->bDataBits);
+
switch(coding->bCharFormat) {
case 0:
usart_set_stopbits(USBUSART, USART_STOPBITS_1);
@@ -73,6 +156,7 @@ void usbuart_set_line_coding(struct usb_cdc_line_coding *coding)
usart_set_stopbits(USBUSART, USART_STOPBITS_2);
break;
}
+
switch(coding->bParityType) {
case 0:
usart_set_parity(USBUSART, USART_PARITY_NONE);
@@ -108,41 +192,50 @@ void usbuart_usb_out_cb(usbd_device *dev, uint8_t ep)
gpio_clear(LED_PORT_UART, LED_UART);
}
-static uint8_t uart_usb_buf[CDCACM_PACKET_SIZE];
-static uint8_t uart_usb_buf_size;
void usbuart_usb_in_cb(usbd_device *dev, uint8_t ep)
{
- if (!uart_usb_buf_size) {
- gpio_clear(LED_PORT_UART, LED_UART);
- return;
- }
-
- usbd_ep_write_packet(dev, ep, uart_usb_buf, uart_usb_buf_size);
- uart_usb_buf_size = 0;
+ (void) dev;
+ (void) ep;
}
+/*
+ * Read a character from the UART RX and stuff it in a software FIFO.
+ * Allowed to read from FIFO out pointer, but not write to it.
+ * Allowed to write to FIFO in pointer.
+ */
void USBUSART_ISR(void)
{
char c = usart_recv(USBUSART);
- /* Don't try to write until we are configured.
- * Otherwise enumeration hanged in some cases.
- */
- if (cdcacm_get_config() != 1)
- return;
-
+ /* Turn on LED */
gpio_set(LED_PORT_UART, LED_UART);
- /* Try to send now */
- if (usbd_ep_write_packet(usbdev, CDCACM_UART_ENDPOINT, &c, 1) == 1)
- return;
-
- /* We failed, so queue for later */
- if (uart_usb_buf_size == CDCACM_PACKET_SIZE) {
- /* Drop if the buffer's full: we have no flow control */
- return;
+ /* If the next increment of rx_in would put it at the same point
+ * as rx_out, the FIFO is considered full.
+ */
+ if (((buf_rx_in + 1) % FIFO_SIZE) != buf_rx_out)
+ {
+ /* insert into FIFO */
+ buf_rx[buf_rx_in++] = c;
+
+ /* wrap out pointer */
+ if (buf_rx_in >= FIFO_SIZE)
+ {
+ buf_rx_in = 0;
+ }
+
+ /* enable deferred processing if we put data in the FIFO */
+ timer_enable_irq(USBUSART_TIM, TIM_DIER_UIE);
}
+}
+
+void USBUSART_TIM_ISR(void)
+{
+ /* need to clear timer update event */
+ timer_clear_flag(USBUSART_TIM, TIM_SR_UIF);
- uart_usb_buf[uart_usb_buf_size++] = c;
+ /* process FIFO */
+ usbuart_run();
}
+