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authorAllen Ibara2013-03-27 12:09:49 -0700
committerGareth McMullin2013-04-27 12:56:58 -0700
commit43f7e7a3cf384e880bfefa6257f15c8915b02e3b (patch)
tree9622a7c2b363279e61cff4f0f2996093cb3cf018 /src/platforms/native/platform.h
parentf1ea5ed8f9f6dc1f006185d051da682bed63c6ac (diff)
Changes to the USBUART to make it less likely to drop characters at higher baud rates.
USB UART seems to work fine at 115.2Kbps or 230.4Kbps, but starts to drop characters as the data rate goes higher. This commit changes the usbuart ISR to fill a software FIFO, and adds a low priority timer interrupt to run deferred processing to drain a FIFO and send USB CDCACM packets, rather than calling the usb send within the UART ISR. Tested on native platform, up to 1.5MBps.
Diffstat (limited to 'src/platforms/native/platform.h')
-rw-r--r--src/platforms/native/platform.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/platforms/native/platform.h b/src/platforms/native/platform.h
index a1471dc..eb91f8b 100644
--- a/src/platforms/native/platform.h
+++ b/src/platforms/native/platform.h
@@ -122,6 +122,7 @@ extern usbd_device *usbdev;
*/
#define IRQ_PRI_USB (2 << 4)
#define IRQ_PRI_USBUSART (1 << 4)
+#define IRQ_PRI_USBUSART_TIM (3 << 4)
#define IRQ_PRI_USB_VBUS (14 << 4)
#define IRQ_PRI_TRACE (0 << 4)
@@ -133,6 +134,10 @@ extern usbd_device *usbdev;
#define USBUSART_PORT GPIOA
#define USBUSART_TX_PIN GPIO9
#define USBUSART_ISR usart1_isr
+#define USBUSART_TIM TIM4
+#define USBUSART_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM4EN)
+#define USBUSART_TIM_IRQ NVIC_TIM4_IRQ
+#define USBUSART_TIM_ISR tim4_isr
#define TRACE_TIM TIM3
#define TRACE_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM3EN)